Advertisement

Switch-Level Modeling in VHDL

  • Alec G. Stanculescu

Abstract

VHDL is a language to build and program an event-driven simulator. For this purpose it is excellent. It is even better than it was intended to be! For example, even the designers of the language considered the behavior of the bi-directional pass-transistor outside the scope of pure VHDL. It is in part to their credit that they were wrong on this issue. VHDL is a very powerful language for programming an event-driven simulator.

Keywords

Circuit Design Resolution Function Simulation Cycle Open Path Primary Node 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    R.D. Acosta, S.P. Smith, Jeff LarsonMixed-Mode Simulation of Compiled VHDL ProgramsICCAD89.Google Scholar
  2. [2]
    B.R. Stanisic, M. W. BrownVHDL Modeling for Analog-Digital Hardware Designs, ICCAD89.Google Scholar
  3. [3]
    R.E. BryantASurvey of Switch-Level Algorithms, IEEE Design and Test of Computers, vol. 4, no. 4, pp.26–40, August 1987.CrossRefGoogle Scholar
  4. [4]
    D.R. CoelhoThe VHDL Handbook, Kluwer Academic Publishers, Norwell, MA, 1989.CrossRefGoogle Scholar
  5. [5]
    P. Flake, P. Moorby, G. Musgrave, AnAlgebra for Logic Strength Simulation20th Design Automation Conference, IEEE 1983.Google Scholar
  6. [6]
    P. Flake, P. Moorby, G. MusgraveLogic Simulation of Bidirectional Tri-state GatesProc ICCC80, Port Chester, NY pp 594–600.Google Scholar
  7. [7]
    D. Overhauser, L Hajj, Y-F. HsuAutomatic Mixed-Mode Timing SimulationICCAD89.Google Scholar
  8. [8]
    V.B. Rao, D.V. Overhauser, T.N. Trick, I.N. HajjSwitch-Level Timing Simulation of MOS VLSI CircuitsKluwer Academic Publishers, Norwell, MA, 1989.Google Scholar
  9. [9]
    A.G. Stanculescu, A.S. Tsay, A.N.D.Zamfirescu, D.L. PerrySwitchLeveI VHDL DescriptionsICCAD89.Google Scholar
  10. [10]
    A.G. Stanculescu, A.S. TsayA 46-State Value-System from Vantage Analysis Systems Inc.VHDL User’s Group VHDL Design Exchange Group meeting, February 89.Google Scholar
  11. [11]
    The Computer Society of the IEEE’s DATC Design Automation Standards CommitteeThe Sense of the VASGProceedings of the Second Fall User’s Group Meeting, October 1989.Google Scholar
  12. [12]
    IEEEVHDLLanguage Reference Manual, IEEE std 1076–1987, N.Y., N.Y., March 1988.Google Scholar
  13. [13]
    R. Lipsett, Carl Schaefer, Cary UsseryVHDL: Hardware Description and DesignKluwer Academic Publishers, Norwell, MA, 1989.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 1991

Authors and Affiliations

  • Alec G. Stanculescu
    • 1
  1. 1.Fintronic USA, Inc.Menlo ParkUSA

Personalised recommendations