Syntactic Neural Networks in VLSI
Syntactic neural networks (SNNs) are an important new paradigm for neural computation. Their power stems from the existence of an underlying grammar which allows natural expression of time-varying patterns. In this paper, we are primarily concerned with the implementation of SNNs in VLSI. Their benefits for this purpose, compared to more common neural architectures, include sparse connections, fast learning and — for those nets based on a non-stochastic grammar — a simple and elegant digital realisation. We illustrate this with an example application; a dynamic signature verification system. Results are presented for a software simulation in which learning proceeds off-line. Hardware implementation is straightforward, requiring only a small number ofRAMs, shift-registers and adders.
KeywordsDynamic Time Warping VLSI Implementation Signature Verification Programmable Logic Array Weighted Euclidean Distance
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