Abstract
Concurrent rewriting is a very general model of parallel computation based on logic; it directly supports parallel programming in very high level declarative languages ideally suited for AI applications. The Rewrite Rule Machine (RRM) is a massively parallel computer that physically realizes the concurrent rewriting model. The RRM is hierarchical, with SIMD computation performed at the chip level (called an ensemble) but the machine as a whole - consisting of thousands of ensemble chips - working in MIMD mode.
After a brief overview of the model of computation and the overall architecture, the paper focuses on the functionality and detailed architectural design of the ensemble chip. Topics discussed include the ensemble’s processing elements, topology, instruction set, autonomous processes, and VLSI design.
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References
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Aida, H., Leinwand, S., Meseguer, J. (1991). Architectural Design of the Rewrite Rule Machine Ensemble. In: Delgado-Frias, J.G., Moore, W.R. (eds) VLSI for Artificial Intelligence and Neural Networks. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3752-6_2
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DOI: https://doi.org/10.1007/978-1-4615-3752-6_2
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