Design Description Languages

Abstract

The input to high-level synthesis (HLS) is typically a behavioral description written in a hardware-description language (HDL). HDLs allow the user to specify the design's outputs in terms of the inputs over time using abstract data carriers and language operators. At a glance, such a language might seem similar to a high-level programming language like ‘C’ or Pascal, in which programs are written using sequences of statements with expressions that assign values to variables. However, the semantics of a behavior specified in an HDL implies a hardware design yet to be implemented (built), rather than a piece of behavior to be executed on an existing machine. Furthermore, these HDLs have additional constructs to accommodate the intrinsic features of hardware, such as the notions of clocking and asynchrony.