Measuring Process Migration Effects Using an MP Simulator

  • Andrew Ladd
  • Trevor Mudge
  • Oyekunle Olukotun


This chapter examines multiprocessors that are used in throughput mode to multiprogram a number of unrelated sequential programs. This is the most common use for multiprocessors. There is no data sharing between the programs. Each program forms a process that is scheduled to execute on a processor until it blocks because its time-slice expires or for I/O. The process can migrate among the processors when its turn to resume occurs. The degree of process migration can dramatically impact the behavior of caches and hence the throughput of the multiprocessor. This chapter investigates the behavior of cache misses that can result from different degrees of process migration. The degree of migration is varied by assigning each process an affinity for a particular processor. An efficient multiprocessor cache simulator is described that is used in the study. The study is restricted to shared-bus multiprocessors and two contrasting cache consistency protocols, write update and invalidate.


Cache Size Firefly Algorithm Cache Line Context Switch Global Schedule 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 1992

Authors and Affiliations

  • Andrew Ladd
    • 1
  • Trevor Mudge
    • 1
  • Oyekunle Olukotun
    • 1
  1. 1.Advanced Computer Architecture Lab Department of Electrical Engineering and Computer ScienceUniversity of MichiganAnn ArborUSA

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