Abstract
Formal methods involve representing an implementation and a specification within a formal theory or calculus. Verification compares the representations within the formal theory, reasoning that under particular constraints the implementation ensures the specification is (or is not) met.
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© 1992 Springer Science+Business Media New York
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Graham, B.T. (1992). Formal Methods and Verification. In: The SECD Microprocessor. The Springer International Series in Engineering and Computer Science, vol 178. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3576-8_1
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DOI: https://doi.org/10.1007/978-1-4615-3576-8_1
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6589-1
Online ISBN: 978-1-4615-3576-8
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