Advertisement

Chip and Board Testing

  • Kevin T. Kornegay
Chapter
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 181)

Abstract

Upon receipt of the chip from a fabrication foundry, testing is required to exercise the chip to determine whether it implements its intended functions. If an incorrect response is observed, a second objective of testing is to diagnose why the chip behaved incorrectly. Furthermore, in order to meet the tight design constraints imposed on today’s chip designers, such as reduced chip to market time and reduced cost, testing must be considered very early in the design process.

Keywords

Print Circuit Board Board Test Sequential Circuit Combinational Circuit Automatic Test Pattern Generation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Rererences

  1. [Funatsu75]
    S.N. Funatsu, N. Swkatsuki, T. Arima, “Test Generation Systems in Japan”, 12th Design Automation Symposium, pp. 112–114, June 1975.Google Scholar
  2. [Goe181]
    P. Goel, “An Implicit Enumeration ALgorithm to Generate Tests for Combinational Logic Circuits”, IEEE Trans. on Computer, pp. 215–222, 1981Google Scholar
  3. [IEEE90]
    IEEE Std 1149.1–1990“IEEE Standard Test Access Port and Boundary Scan Architecture”February 15, 1990.Google Scholar
  4. [USC88]
    USC Test Group, “Test Generation System (TGS) User’s Manual”, Department of Electrical Engineering-Systems, University of Southern California, June 27, 1988.Google Scholar

Copyright information

© Kluwer Academic Publishers 1992

Authors and Affiliations

  • Kevin T. Kornegay

There are no affiliations available

Personalised recommendations