Abstract
This chapter serves as an introduction to IC fabrication of CMOS, bipolar and BiCMOS devices. Section 2.1. is a review of CMOS process technologies. Examples for an N-well CMOS process and a twin-tub CMOS process are considered. Section 2.2. deals with bipolar technology with emphasis on advanced bipolar structures. The topic of the isolation techniques used for both bipolar and CMOS is addressed in Section 2.3. In Section 2.4. we discuss the similarities between advanced CMOS and advanced bipolar transistor structures to demonstrate how both technologies are indeed converging. The BiCMOS technologies are introduced in Section 2.5. with emphasis on CMOS-based processes. Three BiCMOS technologies, with different performance/cost, are presented. Section 2.6. introduces a complementary BiCMOS structure, where a vertical isolated PNP transistor is merged with an NPN transistor in a CMOS process. Finally, in Section 2.7, a table with the design rules of a 0.81.μm BiCMOS process is supplied.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
F.M. Wanlass, and C.T. Sah, “Nanowatt Logic using Filed-Effect MOS Triodes,” International Solid-State Circuits Conference Tech. Dig., p. 32 (1963).
L.C. Parrillo, R.S. Payne, R.E. Davis, G.W. Reutlinger, and R.L. Field, “Twin-Tub CMOS: A Technology for VLSI Circuits,” International Electron Devices Meeting Tech. Dig., pp. 752–755 (1980).
K. Ehinger et al., “Narrow BF2 Implanted Bases For 35 GHz/24ps High-Speed Si Bipolar Technology,” International Electron Devices Meeting Tech. Dig., pp. 459–462 (1991).
T.H. Ning, and D.D. Tang, “Bipolar Trends,” Proc. IEEE, Vol. 74, No. 12 pp. 1669–1677 (December 1986).
T. Nakamura, T. Miyazaki, S. Takahashi, T. Kure, T. Okabe, and M. Nagata, “Self-Aligned Bipolar Transistor with Polysilicon Sidewall Base Electrode for High Packing Density and High Speed,” IEEE Journal of Solid-State Circuits, Vol. SC-17, No. 2 pp. 226–230 (April 1982).
T.H. Ning, and R. D. Isaac, “Effect of Emitter Contact on Current Gain of Silicon Bipolar Devices,” IEEE Electron Device Letters, ED-27 pp. 2051–2055 (Nov. 1980).
A.K. Kapoor and D.J. Roulston, Polysilicon Emitter Bipolar Transistors, IEEE Press (1989).
M.I. Elmasry, Digital Bipolar Integrated Circuits, John Wiley Sons, New York (1983).
E. Kooi, J.G. Van Lierop, and J.A. Appels, “Formation of Silicon Nitride at a Si-S¨ª02 Interface during Local Oxidation of Silicon and During Heat Treatment of Oxidized Silicon in NH 3 Gaz,“ J. Electrochem. Soc., Vol. 123 p. 11–17 (1976).
R.D. Rung, H. Momose, and Y. Nagakubo, “Deep-Trench Isolated CMOS Devices,” International Electron Devices Meeting Tech. Dig., p. 6 (1982).
T. Yamaguchi, S. Morimoto, G. Kawamoto, H.K. Park, and G.C. Eiden, “High-Speed Latch-up Free 0.5 pm-Channel CMOS using Self-Aligned Ti-Si and Deep-Trench Isolation Technologies,” International Electron Devices Meeting Tech. Dig., p. 522 (1983).
R.D. Rung, “Trench Isolation Prospects for Application in CMOS VLSI,” International Electron Devices Meeting Tech. Dig., pp. 574–577 (1984).
H. Mikoshiba, T. Homma, and K. Hamano, “A New Trench Isolation Technology as a Replacement for LOCOS,” International Electron Devices Meeting Tech. Dig., pp. 578–581 (1984).
P. Singer, “Selective Epitaxial Growth Finds New Applications,” Semiconductor International, p. 15 (January 1988).
R.A. Chapman, et al., “An 0.8 pm CMOS Technology for High-Performance Logic Applications,” International Electron Devices Meeting Tech. Dig., p. 362 (1987).
K.Y. Chiu, R. Fang, J. Lin, and J.L. Moll, “The SWAMI- A Defect Free and Near-Zero Bird’s Beak Local Oxidation Technology for VLSI,” Symp. on VLSI Technology Tech. Dig., pp. 28–29 (1982).
K.Y. Chiu, J.L. Moll, and J. Manoliu, “A Bird’s Beak Free Local Oxidation Technology Feasible for VLSI Circuits Fabrication,” IEEE Trans. on Electron Devices, Vol. ED-29 pp. 536–540 (1982).
J. Hui, P. Van de Voorde and J. Moll, “Scaling Limitations of Submicron Local Oxidation Technology,” International Electron Devices Meeting Tech. Dig., pp. 392- (1985).
H.B. Pogge, “Trench Isolation Technology,” Bipolar Circuits and Technology Meeting Tech. Dig., pp. 18–25 (September 1990).
Y. Niitsu, “Latch-up Free CMOS Structure using Shallow Trench Isolation,” International Electron Devices Meeting Tech. Dig., p. 509 (December 1985).
H. Yamamoto, O. Mizuno, T. Kubota, M. Nakamae, H. Shiraki, and Y. Ikushima, “High-Speed Performance of a Basic ECL Gate with 1.25 Micron Design Rule,” Symp. on VLSI Technology Tech. Dig., pp. 38–39 (1981).
Y. Tamald, T. Shiba, N. Honma, S. Mizuo, and A. Hayazaka, “New U-Groove Isolation Technology for High-Speed Bipolar Memory,” Symp. VLSI Technology Tech. Dig., pp. 24–25 (1983).
D.D. Tang, P.M. Solomon, T.H. Ning, R.D. Isaac, and R.E. Burger, “1.25 pm Deep-Groove-Isolated Self-Aligned Bipolar Circuits,” IEEE Journal of Solid-State Circuits, Vol. SC-17 pp. 925–931 (1982).
H.C. Lin, J.C. Ho, R.R. Iyer, and K. Kwong, “CMOS-Bipolar Transistor Structure,” IEEE Trans. on Electron Devices, Vol. ED-6, No. 11 pp. 945–951 (November 1969).
H. Momose, “High Performance 1.0 Micron N-Well CMOS/Bipolar Technology,” Symp. on VLSI Technology Tech. Dig., pp. 40–41 (1983).
T. Ikeda, A. Watanabe, Y. Nishio, I. Masuda, N. Tamba, M. Okada, and K. Ogiue, “High-Speed BiCMOS Technology with a Buried Twin Well Structure,” IEEE Trans. on Electron Devices, Vol ED-34, No. 6 pp. 1304–1309 (June 1987).
H. Momose, K.M. Cham, C.I. Drowley, H.R. Grinolds, and H.S. Fu, “0.5 Micron BiCMOS Technology,” International Electron Devices Meeting Tech. Dig., pp. 838–840 (Dec. 1987).
A.R. Alvarez, J. Teplik, D.W. Schucker, T. Hulseweh, H.B. Liang, M. Dydyk,and I. Rahim, “Second Generation BiCMOS Gate Array Technology,” Bipolar Circuits and Technology Meeting Tech. Dig., pp. 113–117 (1987).
B. Bastani, C. Lage, L. Wong, J. Small, R. Lahri, L. Bouknight, T. Bowman, J. Manoliu, and T. Tuntasood, “Advanced 1 Micron BiCMOS Technology for High Speed 256k SRAM’s,” Symp. on VLSI Technology Tech. Dig., pp. 41–42 (1987).
T. Yamaguchi and T.H. Yuzuriha, “Process Integration and Device Performance of a Submicron BiCMOS with 16-GHz f, Double Poly-Bipolar Devices,” IEEE Trans. on Electron Devices, 36, No. 5 pp. 890–896 (May 1989).
Shin, “Performance Comparison of Driver Configurations and Full-Swing Techniques for BiCMOS Logic Circuits,” IEEE Journal of Solid-State Circuit, Vol. 25, No3 pp. 863–865 (June 1990).
S.H.K. Embabi, A. Bellaouar, M.I. Elmasry, and R.A. Hadaway, “New FullVoltage-Swing BiCMOS Buffers,” IEEE Journal of Solid-State Circuits, Vol. SC-26 pp. 150–153 (Feb. 1991).
Y. Kobayashi, C. Yamaguchi, Y. Amemiya, and T. Sakai, “High Performance LSI Process Technology: SST CBiCMOS,” International Electron Devices Meeting Tech. Dig., pp. 760–763 (December 1988).
K. Higashitani, H. Honda, K. Ueda, M. Hatanaka, and S. Nagao, “A Novel CBi-CMOS Technology by DIIP Process,” Symp. on VLSI Technology, pp. 77–78 (1990).
T. Maeda, K. Ishimaru, and H. Momose, “Lower Submicron FCBiMOS (Fully Complementary BiMOS) Process with RTP and MeV Implanted 5GHz Vertical PNP Transistor,” Symp. on VLSI Technology, pp. 79–80 (1990).
W.R. Burger, C. Lage, B. Landau, M. DeLong, and J. Small, “An Advanced 0.8 Micron Complementary BiCMOS Technology for Ultra-High Speed Circuit Performance,” Bipolar Circuits and Technology Meeting Tech. Dig., pp. 78–81 (1990).
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 1993 Springer Science+Business Media New York
About this chapter
Cite this chapter
Embabi, S.H.K., Bellaouar, A., Elmasry, M.I. (1993). Process Technology. In: Digital BiCMOS Integrated Circuit Design. The Springer International Series in Engineering and Computer Science, vol 193. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3174-6_2
Download citation
DOI: https://doi.org/10.1007/978-1-4615-3174-6_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6391-0
Online ISBN: 978-1-4615-3174-6
eBook Packages: Springer Book Archive