Abstract
This paper proposes a new technology mapping method in which factorization and technology mapping are performed concurrently. The procedure works in three steps: factorization, cell selection and estimation of constraints. By taking the close relationship of these three steps into account, this method can accommodate detailed constraints because the information in the technology library is accessed during the mapping as well as during the factorization, and a circuit that satisfies given constraints can be synthesized.
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© 1993 Springer Science+Business Media New York
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Inamori, M., Takahara, A. (1993). A New Technology Mapping Method Based on Concurrent Factorization and Mapping. In: Sasao, T. (eds) Logic Synthesis and Optimization. The Kluwer International Series in Engineering and Computer Science, vol 212. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3154-8_15
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DOI: https://doi.org/10.1007/978-1-4615-3154-8_15
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