Abstract
Various acronyms are used to describe programmable logic, such as FPGA, GAL, PAL, EPLD, FPLA. Several of these acronyms have come to imply a particular architecture. EPLD, for example, is usually identified with array-based (AND-OR) programmable logic. This structure is particularly well-suited for implementing wide fan-in logic functions. These array-based structures were popularized in several families of bipolar, fuse-programmable logic devices but most particularly the PAL [Birkner 1978] which was introduced by MMI (Monolithic Memories, Inc. which was later acquired by Advanced Micro Devices.)
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© 1994 Springer Science+Business Media New York
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Hartmann, R. (1994). Erasable Programmable Logic Devices. In: Trimberger, S.M. (eds) Field-Programmable Gate Array Technology. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2742-8_4
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DOI: https://doi.org/10.1007/978-1-4615-2742-8_4
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