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History and Background: Digital Logic and Fault Simulation

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Concurrent and Comparative Discrete Event Simulation

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Abstract

Concurrent Simulation evolved within the area of digital logic and digital logic fault simulation. This area is discussed here, including a few background facts, some history, and terminology. The method of Selective-trace/event-driven simulation, the simulation of memories, and rehearsal strategies are discussed. Neglected directions, such as instruction level simulation, are indicated.

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Authors and Affiliations

  1. Digital Equipment Corporation, USA

    Ernst G. Ulrich & Jack H. Arabian

  2. AT&T Bell Laboratories, USA

    Vishwani D. Agrawal

Authors
  1. Ernst G. Ulrich
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  2. Vishwani D. Agrawal
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  3. Jack H. Arabian
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© 1994 Springer Science+Business Media New York

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Ulrich, E.G., Agrawal, V.D., Arabian, J.H. (1994). History and Background: Digital Logic and Fault Simulation. In: Concurrent and Comparative Discrete Event Simulation. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2738-1_3

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  • DOI: https://doi.org/10.1007/978-1-4615-2738-1_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6181-7

  • Online ISBN: 978-1-4615-2738-1

  • eBook Packages: Springer Book Archive

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