The Silicon Optic Nerve
Communication among neuronal elements is a significant limiting factor in the design of VLSI neuromorphic systems. This fact is not surprising given that a large percentage of the volume of the nervous system is composed of myelinated axons. The degree of convergence and divergence of single neurons is staggering in comparison with human-made computers. It might appear impossible, even in principle, to build such structures in VLSI circuits, which are limited to a two-dimensional plane of silicon. Surprisingly, the cortices of the brain are nearly two-dimensional as well. In fact, we cannot increase the degree of connectivity in a system whose wires occupy space by employing a structure in which nodes are arrayed in three dimensions . There is nothing fundamental about the structure of neural tissue that cannot be embedded in silicon. The thickness of cortical structures can be represented with a correspondingly larger silicon surface area. However, silicon surface area is available on small die, which are several millimeters on a side, and so the number of neurons that can be fabricated on a single die is limited. Consequently, connections between silicon neurons located on different chips are essential for building even moderately sized artificial neural systems. This chapter introduces a general method for interchip communication that is tailored for use in neuromorphic systems.
KeywordsDelay Line Address Event Select Signal Initiation Node Global Address Space
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- 2.Mortara and Vittoz have analyzed the probability of collision between random events and the influence of collisions on accuracy of data transfer .Google Scholar
- 8.The arbiter was designed, and the basic circuit element was analyzed, by Massimo Sivilotti .Google Scholar
- 9.Using conservative estimates, Sivilotti  calculated that safe arbitration could be achieved if the P3/P4 transistors were six times stronger than N3/N4.Google Scholar