Introduction

Abstract

Traditionally, algorithm design and its VLSI implementation have been somewhat isolated from each other. While the algorithm designers tend to stress on improved performance, the VLSI designers look for implementation flexibility. More often than not there exists a mismatch between these two requirements, which results in a long transition between the time an algorithm is developed and its final implementation. Therefore, the design of digital signal processing (DSP) and communications algorithms, which are hardware-efficient and offer implementation flexibility, is of great interest. It is being recognized that in addition to performance, algorithm designers need to address implementation oriented issues such as throughput, power dissipation and area.