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Low-Power CMOS Random Access Memory Circuits

  • Abdellatif Bellaouar
  • Mohamed I. Elmasry

Abstract

Low-power Random Access Memory (RAM) has seen a remarkable and rapid progress in power reduction. Many circuits techniques for active and standby power reduction in static and dynamic RAMs have been devised. In this chapter we study low-power memory circuit techniques which are very interesting for several other applications. Among these circuits, we examine memory cells, sense amplifiers, precharging circuits, etc. Circuit techniques for 1.x V power supply are also discussed. The voltage targets using NiCd and Mn batteries are 1.2 and 1.5 V respectively. The minimum voltage of a NiCd cell is 0.9 V. Also we consider the Voltage Down Converters (VDCs) which are used in memories and processors. No consideration is given to the detail of designing a complete memory chip because a single configuration requires an entire book.

Keywords

Threshold Voltage Memory Cell PMOS Transistor Memory Array Static Random Access Memory 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1995

Authors and Affiliations

  • Abdellatif Bellaouar
    • 1
  • Mohamed I. Elmasry
    • 1
  1. 1.University of WaterlooCanada

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