A Flexible Generator of Component Models

  • Marcus Blüml
  • Frédérique Bouchard
  • Adam Pawlak
Part of the Current Issues in Electronic Modeling book series (CIEM, volume 1)


We present in this paper an automatic tool generating component models built according to a varied choice of modeling rules as well as specification formats. It can substantially aid to build libraries of models. The core of the generator is based on an intermediate format, common for all these input formats and for all possible modeling rules. Around it, a designer may define and/or easily implement as many specification formats and sets of modeling techniques as needed. The generator is described in detail, tested for VHDL models of standard cells, and compared to a ‘classical ’ generator of component models.


Modeling Technique Method Module Server Module Modeling Rule Grammar Rule 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [BBP93]
    M. Blüml, F. Bouchard, A. Pawlak, A Technique for a Flexible Generation of Component ModelsProc. of the Workshop on Design Methodologies for Microelectronics and Signal ProcessingGliwice-Cracow, PolandOctober 1993.Google Scholar
  2. [BKLP92]
    M. Blüml, et al., A Methodology for the Development of High Quality Standard-Cell Models in VHDLVHDL Forum, Spring’92SantanderApril 1992.Google Scholar
  3. [BLP93]
    M. Blüml, M. Lenzen, A. Pawlak, A Workbench For Generation of Component ModelsProc. of EURO-VHDL’93HamburgSept. 1993.Google Scholar
  4. [Coe90]
    D. Coelho, Follow Simple Rules to Create VHDL ModelsElectronic Design, June 14, 1990.Google Scholar
  5. [Dub91]
    J.-L. Dubois, Standard Component Model Definition in VHDLESPRIT Project 2072 ECIP Report, Jan. 91.Google Scholar
  6. [EIA]
    Electronic Industries Association, Commercial Component Model Specification, Revision J, May 1989 and June 1992.Google Scholar
  7. [ESA]
    European Space Agency, VHDL Modeling Guidelines, Issue 1, Sept. 1994.Google Scholar
  8. [ESS90]
    European Silicon Structures Ltd., SOLO 2000 Family Libraries, European Silicon StructuresEdition 3, July 90.Google Scholar
  9. [Gan91]
    L. Gandon, G&D, a VHDL Source Code Generator, Report, GMD-EIS, 1991Google Scholar
  10. [Lev91]
    Oz Levia, Writing High Performance VHDL ModelsProc. of the Second European Conference on VHDL MethodsStockholmSept. 91Google Scholar
  11. [LP92]
    F. Liu, A. Pawlak, Timing Constraint Checks in VHDL-a comparative studyVHDL for Simulation, Synthesis, Formal Proof of HardwareJean Mermet ed., Kluwer Publishers, 1992.Google Scholar
  12. [Men90]
    P. J. Menchini, A Minimalist Approach to VHDL Logic ModelingDesign & Test of Computers, June 1990.Google Scholar
  13. [MIE89]
    N. V. MIETECMIETEC Standard Cell User Manual 2.4mm CMOSN.V. MIETEC, Belgium1989.Google Scholar
  14. [Mor91]
    G. Moretti: Modeling of Standard Component LibrariesApplications of VHDL to Circuit Design, Kluwer Academic Publishers, 1991.Google Scholar
  15. [MUVM93]
    C. Munk, P. Ukelo, A. Vachoux, D. Mlynek, The MODES Global Control Environment, A Tool for Rapid PrototypingProc. of EURO-DAC’93HamburgGoogle Scholar
  16. [Nav91]
    Z. Navabi, Behavioral Level Modeling of Gate Level Loading EffectsProc. of the CHDLMarseilleApril 1991.Google Scholar
  17. [NFG91]
    S. Narayan, F. Vahid, D. Gajski, Translating System Specifications to VHDLIEEE Proc. of the European Conference on Design AutomationAmsterdam1991.Google Scholar
  18. [Sie89]
    Siemens A.G., SCoD ADVANCLL D — Standard Cells1989.Google Scholar
  19. [Sin90]
    B. Singh, A Parametrized CAD Tool for VHDL Model Development with X WindowsReport Virginia Tech.Google Scholar
  20. [Thom92]
    Thomson-CSF, VHDL For Component ModelingESPRIT Project 2072 ECIP Report, Dec. 1992.Google Scholar
  21. [VITAL]
    VITAL: VHDL Initiative Toward ASIC LibrariesModel Development Specification, Version 2.2b March 1994Google Scholar
  22. [VTI88]
    VLSI Technology, Inc., VSC10 Portable Library, VLSI Technology, Inc., 1988.Google Scholar
  23. [Zin90]
    R. Zinszner, Modeling TechniquesFirst European Conference on VHDL MethodsMarseille1990.Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 1995

Authors and Affiliations

  • Marcus Blüml
    • 1
  • Frédérique Bouchard
    • 2
  • Adam Pawlak
    • 3
  1. 1.University of BonnGermany
  2. 2.IRESTEUniversity of NantesFrance
  3. 3.ARTEMISUniversity Joseph FourierGrenobleFrance

Personalised recommendations