Design for Synthesis

Abstract

Synthesis is the process of translating a design from a hardware description (such as VHDL) into a circuit design using components from a specified library (e.g. TTL, ASIC library for a specific technology). VHDL code written for synthesis is not necessarily compatible among synthesizers from different vendors. Each vendor imposes its own sets of rules in the VHDL style, VHDL constructs, and pragmas (i.e. comment directives) to direct the compiler in certain directions. Synthesis is a moving technology with guidelines continuously changing. The reader must study the vendor guidelines and restrictions to perform synthesis with the vendor’s toolset. This chapter provides some elementary guidelines in using VHDL for circuit synthesis along with a summary of the VHDL constructs which are typically synthesizable.