Abstract
This article describes a method used commercially for checking the correctness of integrated circuit designs. The method is applicable to the development of “control-intensive” software programs as well. “Divide-and-conquer” techniques central to this method apply to a broad range of program verification methodologies.
A shorter version of this article appeared with the title “Program Verification” in the May 2000 issue of the Notices of the American Mathematical Society, 47 (5), pp. 534–545, and this article appears with their permission.
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Kurshan, R.P. (2001). Formal Verification of Circuit Designs. In: Datta, B.N. (eds) Applied and Computational Control, Signals, and Circuits. The Springer International Series in Engineering and Computer Science, vol 629. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1471-8_4
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