Skip to main content

Part of the book series: The Kluwer International Series in Engineering and Computer Science ((SECS,volume 657))

  • 205 Accesses

Abstract

Prefetching brings data into the cache before it is expected by the processor, thereby eliminating a potential cache miss. There are two major prefetching schemes. In a software scheme, the compiler predicts the memory access pattern and places prefetch instructions into the code. In a hardware scheme the hardware predicts the memory access pattern and brings data into the cache before required by the processor.

This paper proposes an alternative hardware scheme for prefetching, where a second processor is used solely for the purpose of prefetching data for the primary processor. The scheme does not predict memory access patterns, but rather uses the second processor to run ahead of the primary processor so as to detect future memory accesses and prefetch these references.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  • Chen, T.-F. (July 1993). Data prefetching for high-performance processors. Technical Report PhD Thesis, University of Washington.

    Google Scholar 

  • Dahlgren, F., Dubois, M., and Stenstrom, P. (July 1995). Sequential hardware prefetching in shared-memory multiprocessors. IEEE Transactions on Parallel and Distributed Systems, 6(7).

    Google Scholar 

  • Drach, N. (1995). Hardware implementation issues of data prefetching. In Proceeding of the International Conference on Supercomputing, pages 245–254.

    Google Scholar 

  • Fu, J. W. C. and Patel, J. H. (1992). Stride directed prefetching in scalar processors. In Proceedings of the 25 th International Symposium on Microarchitecture, pages 102–110.

    Google Scholar 

  • Luk, C.-K. and Mowry, T. (1996). Compiler-based prefetching for recursive data structures. In Proceedings of the 7 th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 222–233.

    Google Scholar 

  • Manoharan, S. and Bathula, S. R. (1999). Hardware support for software prefetching. In Proceedings of the 4 th Australasian Computer Architecture Conference, pages 97–108.

    Google Scholar 

  • Mowry, T. (March 1994). Tolerating latency through software-controlled data prefetching. Technical Report PhD Thesis, Stanford University.

    Google Scholar 

  • Porterfield, A. (May 1989). Software methods for improvement of cache performance on supercomputer applications. Technical Report PhD Thesis, Rice University.

    Google Scholar 

  • Sites, R., editor (1992). Alpha Architecture Reference Manual. Digital Press.

    Google Scholar 

  • Smith, A. J. (1982a). Cache memories. ACM Computing Surveys, pages 473–530.

    Google Scholar 

  • Smith, J. E. (1982b). Decoupled access/execute computer architectures. In Proceedings of the 9 th International Symposium on Computer Architecture, pages 112–119.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2002 Springer Science+Business Media New York

About this chapter

Cite this chapter

Kim, SM., Manoharan, S. (2002). Data Prefetching Using Dual Processors. In: Dimopoulos, N.J., Li, K.F. (eds) High Performance Computing Systems and Applications. The Kluwer International Series in Engineering and Computer Science, vol 657. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0849-6_15

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-0849-6_15

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-5269-3

  • Online ISBN: 978-1-4615-0849-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics