Abstract
In the previous chapter, the MTCMOS technique was used to reduce standby leakage power in combinational logic circuits, while attaining a sufficient performance. However, special attention must be paid to the MTCMOS design of sequential logic circuits such as latches and flip-flops (FFs) that have memory functions; this is necessary because stored data in the latch or FF circuits cannot be retained during the sleep standby mode because the virtual ground rails would be floating to cut off the leakage current. This would disconnect the storage nodes from the true power supply rails and possibly corrupt the stored data.
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Further Reading
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Anis, M., Elmasry, M. (2003). MTCMOS Sequential Circuits. In: Multi-Threshold CMOS Digital Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0391-0_5
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DOI: https://doi.org/10.1007/978-1-4615-0391-0_5
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