Rectangle-Packing-Based Module Placement

  • Hiroshi Murata
  • Kunihiro Fujiyoshi
  • Shigetoshi Nakatake
  • Yoji Kajitani


The first and the most critical stage in VLSI layout design is the placement, the background of which is the rectangle packing problem: Given many rectangular modules of arbitrary size, place them without overlapping on a layer in the smallest bounding rectangle. Since the variety of the packing is infinitely many (two-dimensionally continuous), the key issue for successful optimization is in the introduction of a P-admissible solution space, which is a finite set of solutions at least one of which is optimal. This paper proposes such a solution space where each packing is represented by a pair of module name sequences. Searching this space by simulated annealing, hundreds of modules could be successfully packed as demonstrated. Combining a conventional wiring method, the biggest MCNC benchmark ami49 is challenged.


Simulated Annealing Solution Space Physical Design Module Placement Positive Locus 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • Hiroshi Murata
    • 1
  • Kunihiro Fujiyoshi
    • 1
    • 3
  • Shigetoshi Nakatake
    • 1
    • 4
  • Yoji Kajitani
    • 2
    • 4
  1. 1.School of Information ScienceJapan Advanced Institute of Science and TechnologyJapan
  2. 2.Department of Electrical and Electronic EngineeringTokyo Institute of TechnologyJapan
  3. 3.Tokyo University of Agriculture and TechnologyJapan
  4. 4.University of KitakyushuJapan

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