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Microstructure Evolution of Copper in Nanoscale Interconnect Features

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Copper Electrodeposition for Nanofabrication of Electronics Devices

Part of the book series: Nanostructure Science and Technology ((NST))

Abstract

The evolution of copper microstructure and incorporated impurities was studied using transmission electron microscopy (TEM), secondary ion mass spectroscopy (SIMS), and electrical resistance measurements for narrow (~28–40 nm) and wide Damascene features. Resistance measurements suggest an increasing degree of post-CMP microstructure evolution with anneal as linewidth falls below 100 nm for both “doped” and “pure” electrodeposited Cu. SIMS shows increased levels of incorporated sulfur and chlorine in narrow Cu lines whose concentration distributions appear unaffected by annealing at 350 °C, in contrast to redistribution observed in wider lines. Wide lines exhibit significant grain growth with a high temperature anneal, while little to no grain growth is evident upon anneal in narrow line longitudinal TEM sections. This post-anneal resistance drop and concomitant lack of recrystallization and grain growth in the narrow Cu lines is consistent with a microstructure recovery process, where defects in the Cu lattice are eliminated without appreciable formation and growth of new grains.

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Acknowledgments

This work was performed by the Research Alliance Teams at various IBM Research and Development Facilities. We are grateful to Dan Edelstein of IBM for critically reviewing the original manuscript. We also acknowledge useful discussions with Dr. Dan Josell of NIST.

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Authors and Affiliations

  1. IBM Research, Albany, NY, 12203, USA

    James Kelly, James Demarest, Juntao Li & Christopher Penny

  2. IBM Microelectronics, Hopewell Junction, NY, 12533, USA

    Christopher Parks

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  1. James Kelly
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  2. Christopher Parks
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  3. James Demarest
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  4. Juntao Li
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  5. Christopher Penny
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Corresponding author

Correspondence to James Kelly .

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Editors and Affiliations

  1. Dept. of Chemical Engineering, Osaka Prefecture University, Osaka, Japan

    Kazuo Kondo

  2. Intel Corporation, Hillsboro, Oregon, USA

    Rohan N. Akolkar

  3. Dept. of Chemical Engineering, University of New Hampshire, Durham, New Hampshire, USA

    Dale P. Barkey

  4. Industrial Technology Support Institute, Osaka Prefecture, Japan

    Masayuki Yokoi

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Kelly, J., Parks, C., Demarest, J., Li, J., Penny, C. (2014). Microstructure Evolution of Copper in Nanoscale Interconnect Features. In: Kondo, K., Akolkar, R., Barkey, D., Yokoi, M. (eds) Copper Electrodeposition for Nanofabrication of Electronics Devices. Nanostructure Science and Technology. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-9176-7_6

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