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Frontiers of Cu Electrodeposition and Electroless Plating for On-chip Interconnects

Part of the Nanostructure Science and Technology book series (NST)

Abstract

In the electronics industry, interconnect is defined as a conductive connection between two or more circuit elements. It interconnects elements (transistor, resistors, etc.) on an integrated circuit or components on a printed circuit board. The main function of the interconnect is to contact the junctions and gates between device cells and input/output (I/O) signal pads. These functions require specific material properties. For performance or speed, the metallization structure should have low resistance and capacitance. For reliability, it is important to have the capability of carrying high current density, stability against thermal annealing, resistance against corrosion and good mechanical properties.

Keywords

  • Barrier Layer
  • Atomic Layer Deposition
  • Seed Layer
  • Physical Vapour Deposition
  • Chemical Mechanical Polishing

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Fig. 5.1
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Fig. 5.5

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Acknowledgments

This work was part resourced by the Nano-EI project within CCAN—the Collaborative Centre for Applied Nanotechnology (www.ccan.ie), supported by Enterprise Ireland & IDA Ireland (grant no. CC/2009/0002). D. T. acknowledges financial support from Science Foundation Ireland (SFI; grant no. 11/SIRG/B2111).

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Correspondence to James F. Rohan .

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Rohan, J.F., Thompson, D. (2014). Frontiers of Cu Electrodeposition and Electroless Plating for On-chip Interconnects. In: Kondo, K., Akolkar, R., Barkey, D., Yokoi, M. (eds) Copper Electrodeposition for Nanofabrication of Electronics Devices. Nanostructure Science and Technology. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-9176-7_5

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