• Kai Zhao
  • Siddarth Krishnan
  • Barry Linder
  • James H. Stathis


As the CMOS technology nodes progress aggressively into “nano” era, introduction of High-k Metal gate (HKMG) has became key to maintain the scaling trend. Much effort has been devoted to understand the reliability aspects of HKMG over the last decade. Especially in recent years since HfO2-based HKMG was first implemented in high-performance products, the understanding of device instability such as PBTI and NBTI associated with HKMG and gate stack integration has been advanced significantly. In this chapter, some of the latest learning of NBTI and PBTI in HKMG is reviewed. In the first part of the discussion, latest results of process interaction with BTI are reviewed and the key process knobs in HKMG, such as high-k thickness, interfacial layer thickness, nitrogen concentration at IL, and channel type, which modulate NBTI and PBTI are discussed. In the second part of the discussion, recent study of relaxation dynamics and AC behavior of PBTI/NBTI in HKMG is reviewed. The implications to accurate modeling of BTI V t shift under realistic circuit operation conditions are discussed.


Duty Cycle Stress Mode Single Defect Stress Time Emission Time 
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Copyright information

© Springer Science+Business Media New York 2014

Authors and Affiliations

  • Kai Zhao
    • 1
  • Siddarth Krishnan
    • 2
  • Barry Linder
    • 3
  • James H. Stathis
    • 3
  1. 1.IBM ResearchNew YorkUSA
  2. 2.IBM SRDCNew YorkUSA
  3. 3.IBM T.J. Watson Research CenterNew YorkUSA

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