Case Study 2: DSIP Architecture Instances for FIR Filtering

  • Robert Fasthuber
  • Francky Catthoor
  • Praveen Raghavan
  • Frederik Naessens


This chapter demonstrates the high energy efficiency of the proposed Domain Specific Instruction set Processor (DSIP), architecture concept on a challenging very high throughput Finite Impulse Response (FIR), filter for 60 GHz applications. Thereby HardSIMD and SoftSIMD datapath implementations are proposed. Section 5.1 motivates this case study and summarizes related work on digital 60 GHz baseband implementations. The targeted matched filter and the flexibility requirements of this functional block are explained in Sect. 5.2. In Sect. 5.3, the applied algorithm optimizations and the characteristics of the considered algorithm are shown. The proposed HardSIMD and SoftSIMD DSIP architecture instances are presented in Sect. 5.4. Software mapping and hardware implementation results are given in Sect. 5.5. Section 5.6 compares the results to Application Specific Integrated Circuit (ASIC) references and to other programmable implementations. Finally, Sect. 5.7 concludes this chapter. This chapter also includes an appendix which shows preliminary experimental results that were obtained by applying the proposed back-end semi-custom design approach (see appendix of Chap. 3).


  1. 1.
    Anjum, O., Ahonen, T., Garzia, F., Nurmi, J., Brunelli, C., Berg, H.: State of the art baseband DSP platforms for software defined radio: a survey. EURASIP J. Wirel. Commun. Netw. 2011(1), 5 (2011). doi: 10.1186/1687-1499-2011-5 CrossRefGoogle Scholar
  2. 2.
    Ballhaus, W., Pagella, A., Vogel, C.: A change of pace for semiconductor industry? PricewaterhouseCoopers. Technology, Media and Telecommunications (2009)Google Scholar
  3. 3.
    Barale, F., Iyer, G.B., Perumana, B.G., Sen, P., Sarkar, S., Rachamadugu, A., Dudebout, N., Pinel, S., Laskar, J.: Pulse shaping and clock data recovery for multi-gigabit standard compliant 60 GHz digital radio. In: IEEE MTT-S International Microwave Symposium (MWSYM), pp. 908–911 (2010). doi: 10.1109/MWSYM.2010.5517345
  4. 4.
    Baykas, T., Sum, C.S., Lan, Z., Wang, J., Rahman, M., Harada, H., Kato, S.: IEEE 802.15.3c: the first IEEE wireless standard for data rates over 1 Gb/s. IEEE Commun. Mag. 49(7), 114–121 (2011). doi: 10.1109/MCOM.2011.5936164 CrossRefGoogle Scholar
  5. 5.
    Bougard, B., Novo, D., Van der Perre, L., Catthoor, F.: Bridging the energy gap in size, weight and power constrained software defined radio: agile baseband processing as a key enabler. In: IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 5384–5387 (2008). doi: 10.1109/ICASSP.2008.4518877
  6. 6.
    Catthoor, F., Raghavan, P., Lambrechts, A., Jayapala, M., Kritikakou, A., Absar, J.: Ultra-Low Energy Domain-Specific Instruction-Set Processors, 1st edn. Springer (2010)Google Scholar
  7. 7.
    Chen, Z., Peng, X., Zhao, X., Xie, Q., Okamura, L., Zhou, D., Goto, S.: A 6.72-Gb/s 8pJ/bit/iteration IEEE 802.15.3c LDPC decoder chip. In: International Symposium on Integrated Circuits (ISIC), pp. 7–12 (2011). doi: 10.1109/ISICir.2011.6131868
  8. 8.
    Dally, W.J., Balfour, J., Black-Shaffer, J.C., Harting, R.C., Parikh, V., Park, J., Sheffield, D.: Efficient embedded computing. Computer 41(7), 27–32 (2008)CrossRefGoogle Scholar
  9. 9.
    Diamantopoulos, D., Galiatsatos, P., Karachalios, A., Lentaris, G., Reisis, D., Soudris, D.: Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. In: International Conference on Electronics, Circuits, and Systems (ICECS), pp. 192–195 (2011). doi: 10.1109/ICECS.2011.6122246.
  10. 10.
    Encounter Digital Implementation System, Cadence.
  11. 11.
    Fasthuber, R., Li, M., Novo, D., Raghavan, P., Van der Perre, L., Catthoor, F.: Energy-efficient run-time scalable soft-output SSFE MIMO detector architectures. Transaction on high-performance embedded architectures and compilers (HiPEAC), Special Issue SAMOS 2009, vol. 5(3), pp. 1–20 (2011)Google Scholar
  12. 12.
    Fasthuber, R., Agrawal, P., Raghavan, P., Catthoor, F., Van der Perre, L.: A novel energy efficient wireless domain specific processor template. IEEE Trans. Circuits Syst. (TCAS) (2013, in preparation)Google Scholar
  13. 13.
    Guo, R., DeBrunner, L.S.: A novel fast canonical-signed-digit conversion technique for multiplication. In: IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 1637–1640 (2011). doi: 10.1109/ICASSP.2011.5946812
  14. 14.
    Hansen, C.: WiGiG: multi-gigabit wireless communications in the 60 GHz band. IEEE Wirel. Commun. 18(6), 6–7 (2011). doi: 10.1109/MWC.2011.6108325 CrossRefGoogle Scholar
  15. 15.
    IRC: ITRS Roadmap on Interconnect (2009)Google Scholar
  16. 16.
    Janhunen, J., Pitkanen, T., Silven, O., Juntti, M.: Fixed- and floating-point processor comparison for MIMO-OFDM detector. IEEE J. Sel. Top. Signal Process. 5(8), 1588–1598 (2011). doi: 10.1109/JSTSP.2011.2165830 CrossRefGoogle Scholar
  17. 17.
    Jayapala, M., Barat, F., Catthoor, F., Corporaal, H., Deconinck, G.: Clustered loop buffer organization for low energy VLIW embedded processors. IEEE Trans. Comput. 54(6), 672–683 (2005)CrossRefGoogle Scholar
  18. 18.
    Kanistras, N., Tsatsaragkos, I., Mahdi, A., Karagianni, K., Paliouras, V., Gioulekas, F., Lalos, E., Adaos, K., Birbas, M., Karaivazoglou, P., Koziotis, M., Perakis, M.: Digital baseband challenges for a 60GHz gigabit link. In: IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 346–349 (2011). doi: 10.1109/ICECS.2011.6122284
  19. 19.
    Karlstrom, P., Zhou, W., Wang, C.H., Liu, D.: Design of PIONEER: a case study using NoGap. In: Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), pp. 53–56 (2010). doi: 10.1109/PRIMEASIA.2010.5604962
  20. 20.
    Li, M., Fasthuber, R., Novo, D., Van Der Perre, L., Catthoor, F.: Algorithm-architecture co-design of soft-output ML MIMO detector for parallel application specific instruction set processors. In: Design, Automation and Test in Europe (DATE), pp. 1608–1613, IMEC (2009)Google Scholar
  21. 21.
    Limberg, T., Winter, M., Bimberg, M., Klemm, R., Matus, E., Tavares, M.B., Fettweis, G., Ahlendorf, H., Robelly, P.: A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. In: European Solid-State Circuits Conference (ESSCIRC), pp. 466–469. Technische Universtaet Dresden and Vodafone Chair Mobile Communications Systems (Fettweis) (2008)Google Scholar
  22. 22.
    Liu, H.M., Li, G.J., Yan, B., Li, Q.: A 100MHz digital down converter with modified FIR filter for wideband software-defined radios. In: International Conference on Electronics and Information Engineering (ICEIE), pp. V2-540–V2-544 (2010). doi: 10.1109/ICEIE.2010.5559748
  23. 23.
    Marinkovic, M., Piz, M., Panic, G., Ehrig, M., Grass, E.: Performance evaluation of channel coding for Gbps 60-GHz OFDM-based wireless communications. In: IEEE International Symposium on Personal, Indoor and Mobile Radio Communication (PIMRC), pp. 994–998 (2010) doi: 10.1109/PIMRC.2010.5671892
  24. 24.
    Medra, A.: Semi-custom design to reduce the interconnect energy in advanced technologies. Master thesis, Nile University, Egypt (2012)Google Scholar
  25. 25.
    Muller, J., Cathelin, A., Niknejad, A., Kaiser, A.: A FIR baseband filter for high data rate 60-GHz wireless communications. In: IEEE International Symposium on Circuit and Systems (ISCAS), pp. 1771–1774 (2010). doi: 10.1109/ISCAS.2010.5537620
  26. 26.
    Niknejad, A.: Siliconization of 60 GHz. IEEE Microwave Mag. 11(1), 78–85 (2010). doi: 10.1109/MMM.2009.935209 CrossRefGoogle Scholar
  27. 27.
    Park, J., Jeong, W., Mahmoodi-Meimand, H., Wang, Y., Choo, H., Roy, K.: Computation sharing programmable FIR filter for low-power and high-performance applications. IEEE J. Solid-State Circuits 39(2), 348–357 (2004). doi: 10.1109/JSSC.2003.821785 CrossRefGoogle Scholar
  28. 28.
    Park, J.H., Richards, B., Nikolic, B.: A 2 Gb/s 5.6 mW digital LOS/NLOS equalizer for the 60 GHz band. IEEE J. Solid-State Circuits 46(11), 2524–2534 (2011). doi: 10.1109/JSSC.2011.2164137 CrossRefGoogle Scholar
  29. 29.
    Patil, D., Azizi, O., Horowitz, M., Ho, R., Ananthraman, R.: Robust energy-efficient adder topologies. In: IEEE Symposium on Computer Arithmetic (ARITH), pp. 16–28 (2007). doi: 10.1109/ARITH.2007.31
  30. 30.
    Perahia, E., Cordeiro, C., Park, M., Yang, L.L.: IEEE 802.11ad: defining the next generation multi-Gbps Wi-Fi. In: IEEE Consumer Communications and Networking Conference (CCNC), pp. 1–5 (2010). doi: 10.1109/CCNC.2010.5421713
  31. 31.
    Piz, M., Krstic, M., Ehrig, M., Grass, E.: An OFDM baseband receiver for short-range communication at 60 GHz. In: IEEE International Symposium on Circuit and Systems (ISCAS), pp. 409–412 (2009). doi: 10.1109/ISCAS.2009.5117772
  32. 32.
    Portero, A., Talavera, G., Moreno, M., Carrabina, J., Catthoor, F.: Methodology for energy-flexibility space exploration and mapping of multimedia applications to single-processor platform styles. IEEE Trans. Circuits Syst. Video Technol. 21(8), 1027–1039 (2011). doi: 10.1109/TCSVT.2011.2129750 Google Scholar
  33. 33.
    Psychou, G., Fasthuber, R., Hulzink, J., Husiken, J., Catthoor, F.: Subword handling in data-parallel mapping. In: Parallel Programming and Run-Time Management Techniques for Many-core Architectures (PARMA) (2012)Google Scholar
  34. 34.
    Raghavan, P., Lambrechts, A., Jayapala, M., Catthoor, F., Verkest, D., Corporaal, H.: Very wide register: an asymmetric register file organization for low power embedded processors. In: Design, Automation and Test in Europe (DATE), IMEC (2007)Google Scholar
  35. 35.
    Raghavan, P., Lambrechts, A., Jayapala, M., Catthoor, F., Verkest, D.: Distributed loop controller for multi-threading in uni-threaded ILP architectures. IEEE Trans. Comput. 58(3), 311–321 (2009)MathSciNetCrossRefGoogle Scholar
  36. 36.
    Rounioja, K., Puusaari, K.: Implementation of an HSDPA receiver with a customized vector processor. In: International Symposium on System-on-Chip (ISSOC), pp. 1–4 (2006). doi: 10.1109/ISSOC.2006.322004
  37. 37.
    Rowen, C., Nuth, P., Fiske, S.: A DSP architecture optimized for wireless baseband. In: International Symposium on System-on-Chip (SOCC), pp. 151–156 (2009). doi: 10.1109/SOCC.2009.5335658
  38. 38.
    Sheikh, F., Mill, M., Richards, B., Markovic, D., Nikolic, B.: A 1-190 MSample/s 8-64 tap energy-efficient reconfigurable FIR filter for multi-mode wireless communication. In: Symposium on VLSI Circuits, pp. 207–208 (2010). doi: 10.1109/VLSIC.2010.5560297
  39. 39.
    Siligaris, A., Richard, O., Martineau, B., Mounet, C., Chaix, F., Ferragut, R., Dehos, C., Lanteri, J., Dussopt, L., Yamamoto, S.D., Pilard, R., Busson, P., Cathelin, A., Belot, D., Vincent, P.: A 65nm CMOS fully integrated transceiver module for 60GHz wireless HD applications. In: IEEE International Solid-State Circuits Conference (ISSCC), pp. 162–164 (2011). doi: 10.1109/ISSCC.2011.5746264
  40. 40.
    Standard ECMA-387: high rate 60 GHz PHY, MAC and PALs.
  41. 41.
    Standard WirelessHD.
  42. 42.
    Suzuki, T., Yamada, H., Yamagishi, T., Takeda, D., Horisaki, K., Fujisawa, T., Van der Perre, L., Unekawa, Y.: High throughput and low power software defined radio using dynamically reconfigurable baseband processor. IEEE Micro 31(6), 19–28 (2011). doi: 10.1109/MM.2011.95 CrossRefGoogle Scholar
  43. 43.
    Thakkar, C., Lingkai, K., Kwangmo, J., Frappe, A., Alon, E.: A 10Gb/s 45mW adaptive 60GHz baseband in 65nm CMOS. In: Symposium on VLSI Circuits (VLSIC), pp. 24–25 (2011)Google Scholar
  44. 44.
    Tokumaru, M., Ikoma, H., Yamada, Y., Okamoto, K., Yamamoto, A., Shirakawa, Y.: A 14.6th-order 3.456GHz transmit baseband filter in 110nm CMOS for millimeter-wave communication systems. In: IEEE Custom Integrated. Circuit Conference (CICC), pp. 175–178 (2009). doi: 10.1109/CICC.2009.5280872
  45. 45.
    van Berkel, C.: Multi-core for mobile phones. In: Design, Autom. and Test in Europe (DATE), pp. 1260–1265 (2009)Google Scholar
  46. 46.
    Vejanovski, R., Singh, J., Faulkner, M.: ASIC and DSP implementation of channel filter for 3G wireless TDD system. In: International ASIC/SOC Conference, pp. 47–51 (2001). doi: 10.1109/ASIC.2001.954671
  47. 47.
    Verbruggen, B., Craninckx, J., Kuijk, M., Wambacq, P., Van der Plas, G.: A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS. In: IEEE International Solid-State Circuits Conference (ISSCC), pp. 296–297 (2010). doi: 10.1109/ISSCC.2010.5433925
  48. 48.
    Voronenko, Y., Püschel, M.: Multiplierless multiple constant multiplication. ACM Trans. Algorithms 3(2), 11-es (2007). doi: 10.1145/1240233.1240234 Google Scholar

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  • Robert Fasthuber
    • 1
  • Francky Catthoor
    • 2
  • Praveen Raghavan
    • 1
  • Frederik Naessens
    • 1
  1. 1.IMECLeuvenBelgium
  2. 2.IMECHeverleeBelgium

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