Hardware/Software Compilation

  • Ricardo Nobre
  • João M. P. Cardoso
  • Bryan Olivier
  • Razvan Nane
  • Liam Fitzpatrick
  • José Gabriel de F. Coutinho
  • Hans van Someren
  • Vlad-Mihai Sima
  • Koen Bertels
  • Pedro C. Diniz
Chapter

Abstract

This chapter describes the CoSy-based [1, 2] compilers developed in the context of the REFLECT project to support its aspect-oriented design-flow. In particular, these CoSy-based compilers are guided by LARA strategies and are responsible for generating code targeting traditional processors, as well as generating behavioral-RTL VHDL code [3] targeting hardware accelerators. Throughout this chapter, these compilers are referred collectively as reflectc, except when a specific compilation flow (with its specific name) is used. We also describe the compiler development extensions to support the REFLECT approach [4] and the weaving process controlled by LARA strategies [5–7] as described in Chap. 3.

References

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Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  • Ricardo Nobre
    • 1
    • 2
  • João M. P. Cardoso
    • 1
  • Bryan Olivier
    • 3
  • Razvan Nane
    • 4
  • Liam Fitzpatrick
    • 3
  • José Gabriel de F. Coutinho
    • 5
  • Hans van Someren
    • 3
  • Vlad-Mihai Sima
    • 4
  • Koen Bertels
    • 4
  • Pedro C. Diniz
    • 2
  1. 1.Faculdade de Engenharia da Universidade do Porto, FEUPPortoPortugal
  2. 2.Instituto de Engenharia de Sistemas e Computadores, Investigação e Desenvolvimento em Lisboa, INESC-IDLisboaPortugal
  3. 3.ACE Associated Compiler Experts b.vAmsterdamThe Netherlands
  4. 4.Technische Universiteit DelftDelftThe Netherlands
  5. 5.Imperial College London IMPLondonUK

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