Abstract
This chapter describes a stand-alone chopper current-feedback instrumentation amplifier (CFIA) that has improved performance compared to the one described in Chap. 4. It maintains the latter’s low noise and low offset, and also obtains high gain accuracy and low gain drift without trimming. This is achieved by applying dynamic element matching (DEM) to the input and feedback transconductors so as to average out their mismatch. To eliminate the resulting DEM ripple, a gain error reduction loop (GERL) is employed to continuously null the Gm mismatch. The concept and analysis of DEM and the GERL is presented in Sects. 5.2 and 5.3. Then the similarities and differences between the offset reduction loop (ORL) and the GERL are discussed, together with their effects on the input and feedback Gm transfer functions.
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References
Wu R, Makinwa KAA, Huisjing JH (2009) A chopper current-feedback instrumentation amplifier with a 1 mHz 1/f noise corner and and AC-coupled ripple reduction loop. IEEE J Solid-State Circuits 44(12):3232–3243
Slattery C, Nie M (2005) A reference design for high-performance, low-cost weigh scales. Available at http://www.analog.com/library/analogDialogue/archives/39-12/weigh_scale.html
Pertijs MAP, Kindt WJ (2010) A 140 dB-CMRR current-feedback instrumentation amplifier employing ping-pong auto-zeroing and chopping. IEEE J Solid-State Circuits 45(10):2044–2056
Witte JF, Huijsing JH, Makinwa KAA (2008) A current-feedback instrumentation amplifier with 5 μV offset for bidirectional high-side current-sensing. In Proceedings of the IEEE ISSCC, digital technical papers, pp 74–75
Sakunia S, Witte F, Pertijs M, Makinwa KAA (2011) A ping-pong-pang current-feedback instrumentation amplifier with 0.04 % gain error. Paper presented at the IEEE Symposium on VLSI Circuits, pp 60–61
Wu R, Huijsing JH, Makinwa KAA (2011) A current-feedback instrumentation amplifier with a gain error reduction loop and 0.06 % untrimmed gain error. In Proceedings of the IEEE ISSCC, digital technical papers, pp 244–245
Bakker A, Thiele K, Huijsing JH (2000) A CMOS nested-chopper instrumentation amplifier with 100 nV offset. IEEE J Solid-State Circuits 35(12):1877–1883
Degrauwe M, Vittoz E et al (1985) A micropower CMOS-instrumentation amplifier. IEEE J Solid-State Circuits SC-20(3):805–807
Terada J, Nishimura K et al (2008) A 10.3 Gb/s burst-mode CDR using a ∆Σ DAC. IEEE J Solid-State Circuits 43(12):2921–2928
Fan Q, Huijsing JH, Makinwa KAA (2010) A 21nV/√Hz chopper-stabilized multipath current-feedback instrumentation amplifier with 2 μV offset. In Proceedings of the IEEE ISSCC digital technical papers, pp 80–81
Steyaert MSJ, Sansen WMC, Chang Z (1987) A micropower low-noise monolithic instrumentation amplifier for medical purposes. IEEE J Solid-State Circuits SC-22(6):1163–1168
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Wu, R., Huijsing, J.H., Makinwa, K.A.A. (2013). A Chopper Instrumentation Amplifier with Gain Error Reduction Loop. In: Precision Instrumentation Amplifiers and Read-Out Integrated Circuits. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3731-4_5
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DOI: https://doi.org/10.1007/978-1-4614-3731-4_5
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