Generated Clocks

  • Sridhar Gangadharan
  • Sanjay Churiwala


Most complex designs require more than one clock for its functioning. When there are multiple clocks in a design, they would need to interact or share a relationship. Asynchronous clocks are clock signals that don’t share a fixed phase relationship. Having only asynchronous clocks in the design makes it really hard to meet setup and hold requirements when multiple clock domains are interacting. We will explain about this in Chap. 7 as to why it is so. Synchronous clocks share a fixed phase relationship. More often than not synchronous clocks originate from the same source.


Generate Clock Master Clock Source Object Clock Constraint Clock Gating 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  • Sridhar Gangadharan
    • 1
  • Sanjay Churiwala
    • 2
  1. 1.Atrenta, Inc.San JoseUSA
  2. 2.XilinxHyderabadIndia

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