Skip to main content

Part of the book series: Analog Circuits and Signal Processing ((ACSP))

  • 802 Accesses

Abstract

This chapter focuses on the implementation options of frequency synthesizers. It presents the range of architectures that can be used before focusing on the most popular one, the PLL. A detailed view of the most important PLL building blocks is then presented, paving the way for the enhancements that can be made on top of this architecture and that are presented in the next chapters.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

eBook
USD 16.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 149.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Egan WF (2000) Frequency synthesis by phase lock, 2nd edn. Wiley, New York

    Google Scholar 

  2. Best RE (2003) Phase-locked loops: design, simulation, and applications. McGraw-Hill professional engineering, 5th edn. McGraw-Hill, New York

    Google Scholar 

  3. Tang Y, Aktas A, Ismail M, Bibyk S (2001) A fully integrated dual-mode frequency synthesizer for GSM and Wideband CDMA in 0.5um CMOS. In: Proceedings of the 44th IEEE 2001 Midwest symposium on circuits and systems (MWSCAS 2001), Dayton, vol 862, pp 866–869

    Google Scholar 

  4. Abidi AA (1994) Radio-frequency integrated circuits for portable communications. In: Proceedings of the IEEE 1994 custom integrated circuits conference, San Diego, pp 151–158

    Google Scholar 

  5. Razavi B (1998) RF microelectronics. Prentice Hall communications engineering and emerging technologies series. Prentice Hall, Upper Saddle River

    Google Scholar 

  6. Razavi B (1997) Challenges in the design of frequency synthesizers for wireless applications. In: Proceedings of the IEEE 1997 custom integrated circuits conference, Santa Clara, pp 395–402

    Google Scholar 

  7. Tzi-Dar C, Jin-Bin Y, Jen-Shi W (2001) Design and implementation of a low-voltage fast-switching mixed-signal-controlled frequency synthesizer. IEEE Trans Circuits Syst II: Analog Digital Signal Process 48(10):961–971 [see also IEEE transactions on circuits and systems II: express briefs]

    Article  Google Scholar 

  8. Tsung-Hsien L, Kaiser WJ (2001) A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop. IEEE J Solid State Circuits 36(3):424–431

    Article  Google Scholar 

  9. Chi-Wa L, Luong HC (2002) A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications. IEEE J Solid State Circuits 37(4):459–470

    Article  Google Scholar 

  10. Shahani AR, Shaeffer DK, Mohan SS, Samavati H, Rategh HR, del Mar HM, Min X, Yue CP, Eddleman DJ, Horowitz MA, Lee TH (1998) Low-power dividerless frequency synthesis using aperture phase detection. IEEE J Solid State Circuits 33(12):2232–2239

    Article  Google Scholar 

  11. Uusikartano R, Niittylahti J (2001) A periodical frequency synthesizer for a 2.4-GHz fast frequency hopping transceiver. IEEE Trans Circuits Systems II: Analog Digital Signal Process 48(10):912–918 [see also IEEE Transactions on Circuits and Systems II: Express Briefs]

    Article  Google Scholar 

  12. Ogata K (1997) Modern control engineering, 3rd edn. Prentice Hall, Upper Saddle River

    Google Scholar 

  13. Rategh HR, Samavati H, Lee TH (2000) A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver. IEEE J Solid State Circuits 35(5):780–787

    Article  Google Scholar 

  14. Do MA, Zhao R, Yeo KS, Ma JG (2001) Fully integrated 10 GHz CMOS VCO. Elect Lett 37(16):1021–1023

    Article  Google Scholar 

  15. Leeson DB (1966) A simple model of feedback oscillator noise spectrum. Proc IEEE 54(2):329–330

    Article  Google Scholar 

  16. Hajimiri A, Lee TH (1998) A general theory of phase noise in electrical oscillators. IEEE J Solid State Circuits 33(2):179–194

    Article  Google Scholar 

  17. Hajimiri A, Lee TH (1998) Corrections to “a general theory of phase noise in electrical oscillators”. IEEE J Solid State Circuits 33(6):928–928

    Article  Google Scholar 

  18. Jannesari A, Kamarei M (2007) Comments on “a general theory of phase noise in electrical oscillators”. IEEE J Solid State Circuits 42(10):2314–2314

    Article  Google Scholar 

  19. Demir A, Mehrotra A, Roychowdhury J (2000) Phase noise in oscillators: a unifying theory and numerical methods for characterization. IEEE Trans Circuits Systems I: Fundam Theory Appl 47(5):655–674

    Article  Google Scholar 

  20. Demir A (2002) Phase noise and timing jitter in oscillators with colored-noise sources. IEEE Trans Circuits Syst I: Fundam Theory Appl 49(12):1782–1791

    Article  Google Scholar 

  21. Vanassche P, Gielen G, Sansen W (2002) On the difference between two widely publicized methods for analyzing oscillator phase behavior. In: IEEE/ACM international conference on computer aided design (ICCAD 2002), San Jose, pp 229–233

    Google Scholar 

  22. Samavati H, Hajimiri A, Shahani AR, Nasserbakht GN, Lee TH (1998) Fractal capacitors. IEEE J Solid State Circuits 33(12):2035–2041

    Article  Google Scholar 

  23. Sumi Y, Syoubu K, Obote S, Fukui Y, Itoh Y (1998) A new PLL frequency synthesizer using multi-programmable divider. IEEE Trans Consumer Electr 44(3):827–832

    Article  Google Scholar 

  24. Vaucher CS, Ferencic I, Locher M, Sedvallson S, Voegeli U, Wang Z (2000) A family of low-power truly modular programmable dividers in standard 0.35um CMOS technology. IEEE J Solid State Circuits 35(7):1039–1045

    Article  Google Scholar 

  25. Miller B, Conley RJ (1991) A multiple modulator fractional divider. IEEE Trans Instrum Measure 40(3):578–583

    Article  Google Scholar 

  26. Perrott MH, Trott MD, Sodini CG (2002) A modeling approach for sigma-delta fractional-N frequency synthesizers allowing straightforward noise analysis. IEEE J Solid State Circuits 37(8):1028–1038

    Article  Google Scholar 

  27. Arora H, Klemmer N, Morizio JC, Wolf PD (2005) Enhanced phase noise modeling of fractional-N frequency synthesizers. IEEE Trans Circuits Syst I: Regular Papers 52(2):379–395

    Article  MathSciNet  Google Scholar 

  28. Hedayati H, Bakkaloglu B, Khalil W (2006) Closed-loop nonlinear modeling of wideband sigma-delta fractional-N frequency synthesizers. IEEE Trans Microw Theory Tech 54(10):3654–3663

    Article  Google Scholar 

  29. De Muer B, Steyaert MSJ (2003) On the analysis of delta-sigma fractional-N frequency synthesizers for high-spectral purity. IEEE Trans Circuits Syst II: Analog Digital Signal Process 50(11):784–793 [see also IEEE transactions on circuits and systems II: express briefs]

    Article  Google Scholar 

  30. Mao X, Yang H, Wang H (2006) An analytical phase noise model of charge pump mismatch in sigma-delta frequency synthesizer. J Analog Integr Circuits Signal Process 48(3):223–229

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2012 Springer Science+Business Media New York

About this chapter

Cite this chapter

Atallah, J.G., Ismail, M. (2012). Frequency Synthesizers. In: Integrated Frequency Synthesis for Convergent Wireless Solutions. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1466-7_5

Download citation

  • DOI: https://doi.org/10.1007/978-1-4614-1466-7_5

  • Published:

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4614-1465-0

  • Online ISBN: 978-1-4614-1466-7

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics