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Hardware Design for C-Based Complex Event Processing

  • Hiroaki InoueEmail author
  • Takashi Takenaka
  • Masato Motomura
Chapter

Abstract

Complex event processing (CEP) is a new computing paradigm that extracts meaningful information from a sequence of events in real-time application domains. Existing software-based CEP systems, however, suffer from poor event processing performance because such real-time application domains require high performance. Recent promising approaches would seem to be use of FPGAs in order to accelerate event processing performance. This chapter presents an efficient complex event processing framework, designed to process a large number of sequential events on FPGAs. Key to the success of our work is logic automation generated with our C-based event language. With this language, we have achieved both higher event processing performance and higher flexibility for application designs than those with SQL-based CEP systems. Evaluations on an FPGA-based NIC show that we have achieved 12.3 times better event processing performance than does CPU software in a financial trading application.

Keywords

Regular Expression Aggregation Function Data Path Structure Query Language Network Interface Card 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgements

We thank O. Arakawa, T. Iihoshi, K. Ichino, K. Imamura, O. Itoku, S. Kamiya, S. Karino, S. Morioka, A. Motoki, S. Nakadai, Y. Nakamura, N. Nishi, M. Nishihara, M. Petersen, H. Tagato, M. Tani, A. Tsuji, K. Wakabayashi, and N. Yamagaki for their great contributions.

References

  1. 1.
  2. 2.
    Abadi DJ, Carney D, Cetintemel U, Cherniack M, Convey C, Lee S, Stonebraker M, Tatbul N, Zdonik S (2003) Aurora: a new model and architecture for data stream management. Int J Very Large Data Bases 12(2):120–139CrossRefGoogle Scholar
  3. 3.
    Anicic D, Ahmad Y, Balazinska M, Cetintemel U, Cherniack M, Hwang J-H, Linder W, Maskey AS, Rasin A, Ryvkina E, Tatbul N, Xing Y, Zdonik S (2005) The design of the borelias stream processing engine. In: Biennial conference on innovative data systems research. Very Large Data Base Endowment Inc. Franklin County, Ohio, USA, pp 277–289Google Scholar
  4. 4.
    Anicic D, Fodor P, Rudolph S, Stuehmer R, Stojanovic N, Studer R (2010) A rule-based language for complex event processing and reasoning. In: International conference on web reasoning and rule systems. Springer, Berlin, (Lecture Notes in Computer Science series), pp 42–57Google Scholar
  5. 5.
    Chandrasekaran S, Cooper O, Deshpande A, Franklin MJ, Hellerstein JM, Hong W, Krishnamurthy S, Madden S, Raman V, Reiss F, Shah M (2003) TelegraphCQ: continuous dataflow processing for an uncertain world. In: Biennial conference on innovative data systems research. Very Large Data Base Endowment Inc. Franklin County, Ohio, USA, pp 269–280Google Scholar
  6. 6.
    Demers A, Gehrke J, Panda B, Riedewald M, Sharma V, White W (2007) Cayuga: a general purpose event monitoring system. In: Biennial conference on innovative data systems research. Very Large Data Base Endowment Inc. Franklin County, Ohio, USA, pp 412–422Google Scholar
  7. 7.
    Gedik B, Andrade H, Wu K-L, Yu PS, Doo MC (2008) SPADE: the system s declarative stream processing engine. In: ACM international conference on management of data. ACM, New York, USA, pp 1123–1134Google Scholar
  8. 8.
    Gyllstrom D, Agrawal J, Diao Y, Immerman N (2008) On supporting Kleene closure over event streams. In: International conference on data engineering. IEEE Computer Society, Washington, DC, USA, pp 1391–1393Google Scholar
  9. 9.
    Kraemer J, Seeger B (2004) PIPES-a public infrastructure for processing and exploring streams. In: ACM international conference on management of data. ACM, New York, USA, pp 925–926Google Scholar
  10. 10.
    Naughton J, Chen J, Kang J, Prakash N, Shanmugasundaram J, Ramamurthy R, Chen R, DeWitt D, Galanis L, Luo Q, Tian F, Zhang C, Jackson B, Gupta A, Maier D, Tufte K (2001) The Niagara internet query system. IEEE Data Eng Bulletin 24(1):27–33Google Scholar
  11. 11.
    The STREAM Group (2003) STREAM: the stanford stream data manager. IEEE Data Eng Bulletin 26(1):19–26Google Scholar
  12. 12.
    Mendes MR, Bizarro P, Marques P (2009) A performance study of event processing systems. Performance Evaluation and Benchmarking, vol 5895, pp 221–236CrossRefGoogle Scholar
  13. 13.
    OPRA Updated traffic projections 2011 & 2012. http://www.opradata.com/specs/upd_traffic_proj_11_12.pdf
  14. 14.
    Mueller R, Teubner J, Alonso G (2009) Streams over wires – a query compiler for FPGAs. Int Conf Very Large Data Bases 2(1):229–240Google Scholar
  15. 15.
    Woods L, Teubner J, Alonso G (2010) Complex event detection at wire speed with FPGAs. Int Conf Very Large Data Bases 3(1–2):660–669Google Scholar
  16. 16.
    Inoue H, Takenaka T, Motomura M (2011) 20Gbps C-based complex event processing. IEEE international conference on field programmable logic and applications. IEEE Computer Society, Washington, DC, USA, pp 97–102Google Scholar
  17. 17.
  18. 18.
    Wakabayashi K, Schafer BC (2008) All-in-C: behavioral synthesis and verification with CyberWorkBench. High-Level synthesis. Springer, Berlin, pp 113–127Google Scholar
  19. 19.
    Zemke F, Witkowski A, Cherniak M (2007) Pattern matching in sequences of rows. ANSI Standard ProposalGoogle Scholar
  20. 20.
    Sidhu R, Prasanna V (2001) Fast regular expression matching using FPGAs. In: IEEE symposium on field-programmable custom computing machines. IEEE Computer Society, Washington, DC, USA, pp 227–238Google Scholar
  21. 21.
    Mandelbrot RB, Hudson RL (2006) The (mis)behavior of markets – a fractal view of risk, ruin, and reward. Basic BooksGoogle Scholar
  22. 22.
    Baker ZK, Prasanna VK (2004) A methodology for the synthesis of efficient intrusion detectoin systems on FPGAs. In: IEEE symposium on field programmable custom computing machine. IEEE Computer Society, Washington, DC, USA, pp 135–144Google Scholar
  23. 23.
    Bruschi F, Paolieri M, Rana V (2010) A reconfigurable system based on a parallel and pipelined solution for regular expression matching. In: IEEE international conference on field-programmable logic and applications. IEEE Computer Society, Washington, DC, USA, pp 44–49Google Scholar
  24. 24.
    Cho YH, Navab S, WHM-Smith (2002) Specialized hardware for deep network packet filtering. In: International conference on field programmable logic and applications. Springer-Verlag, London, UK, pp 452–461Google Scholar
  25. 25.
    Clark CR, Schimmel DE (2003) Efficient reconfigurable logic circuits for matching complex network intrustion detection patterns. In: International conference on field programmable logic and applications. Springer, Berlin, (Lecture Notes in Computer Science series), pp 956–959Google Scholar
  26. 26.
    Hutchings BL, Franklin R, Carver D (2002) Assisting network intrusion detection with reconfigurable hardware. In: IEEE symposium on field-programmable custom computing machine. IEEE Computer Society, Washington, DC, USA, pp 111–120Google Scholar
  27. 27.
    Kennedy A, Wang X, Liu Z, Liu B (2010) Ultra-high throughput string matching for deep packet inspection. In: ACM/IEEE design, automation & test in Europe. European Design and Automation Association 3001 Leuven, Belgium, pp 399–404Google Scholar
  28. 28.
    Lin C-H, Huang C-T, Jiang C-P, Chang S-C (2007) Optimization of pattern matching circuits for regular expression on FPGA. IEEE Trans Very Large Scale Integration Syst 15(12): 1303–1310CrossRefGoogle Scholar
  29. 29.
    Yamagaki N, Sidhu R, Kamiya S (2008) High-speed regular expressin matching engine using multi-character NFA.In: IEEE international conference on field programmable logic and applications. IEEE Computer Society, Washington, DC, USA, pp 131–136Google Scholar
  30. 30.
    Torii S, Suzuki S, Tomonaga H, Tokue T, Sakai J, Suzuki N, Murakami K, Hiraga T, Shigemoto K, Tatebe Y, Obuchi E, Kayama N, Edahiro M, Kusano T, Nishi N (2005) A 600MIPS 120mW 70uA leakage triple-CPU mobile application processor chip. In: IEEE International Solid-State Circuits Conference. IEEE Piscataway, NJ, USA, pp 136–137Google Scholar
  31. 31.
    Altera (2002) Atlantic interface specification ver 3.0Google Scholar
  32. 32.
  33. 33.
    Sadoghi M, Labrecque M, Singh H, Shum W, Jacobsen H-A (2010) Efficient event processing through reconfigurable hardware for algorithmic trading. Int Conf Very Large Data Bases 3(1–2):1525–1528Google Scholar
  34. 34.
    Jiang W, Gokhale M (2010) Real-time classification of multimedia traffic using FPGA. In: IEEE international conference on field programmable logic and applications. IEEE Computer Society, Washington, DC, USA pp 56–63Google Scholar
  35. 35.
    Teubner J, Mueller R (2011) How soccer players would do stream joins. In: ACM International conference on management of data. ACM, New York, USA, pp 625–6sGoogle Scholar
  36. 36.
  37. 37.
    StreamIt language specification version 2.1 (2006) http://groups.csail.mit.edu/cag/streamit/papers/streamit-lang-spec.pdf

Copyright information

© Springer Science+Business Media, LLC 2013

Authors and Affiliations

  • Hiroaki Inoue
    • 1
    Email author
  • Takashi Takenaka
    • 2
  • Masato Motomura
    • 3
  1. 1.Green Platform Research LaboratoriesNEC CorporationKawasakiJapan
  2. 2.Green Platforms Research LaboratoriesNEC CorporationKawasakiJapan
  3. 3.Graduate School of Information Science and TechnologyHokkaido UniversitySapporoJapan

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