A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions

  • Abhranil MaitiEmail author
  • Vikash Gunreddy
  • Patrick Schaumont


We propose a systematic method to evaluate and compare the performance of physical unclonable functions (PUFs). The need for such a method is justified by the fact that various types of PUFs have been proposed so far. However, there is no common method that can fairly compare them in terms of their performance. We first propose three generic dimensions of PUF measurement. We then define several parameters to quantify the performance of a PUF along these dimensions. We also analyze existing parameters proposed by other researchers. Based on our analysis, we propose a compact set of parameters that will be used as a tool to evaluate as well as compare the performance of different PUFs. To make the method independent of the underlying PUF technique, we focus on the statistical properties of the binary PUF responses. We demonstrate the proposed method with a detailed comparison analysis between two PUFs: the ring-oscillator-based PUF (RO PUF) and the Arbiter-based PUF (APUF) using measured data from PUF implementations in state-of-the-art FPGAs. Finally, we present an online database where our measurements and analysis results can be consulted. Our dataset comprises measurements in 193 FPGAs.


Comparison Method Delay Path Ring Oscillator Normal Operating Condition SRAM Cell 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This work was supported by the National Science Foundation by grant no. 0964680 and grant no. 0855095. A special credit goes to Michael Cantrell for his contribution in developing the PUF database as well as the web interface to access it.


  1. 1.
    Armknecht F, Maes R, Sadeghi A-R, Standaert F-X, Wachsmann C (2011) A formal foundation for the security features of physical functions. IEEE Security and Privacy 2011(1):16Google Scholar
  2. 2.
    Bolotnyy L, Robins G (2007) Physically unclonable function-based security and privacy in rfid systems. In: Fifth annual IEEE international conference on pervasive computing and communications, PerCom 2007, pp 211–220, March 2007Google Scholar
  3. 3.
    Devadas S, Suh E, Paral S, Sowell R, Ziola T, Khandelwal V (2008) Design and implementation of puf-based “unclonable” rfid ics for anti-counterfeiting and security applications. In: IEEE international conference on RFID 2008, pp 58–64, April 2008Google Scholar
  4. 4.
    Gassend B, Clarke D, van Dijk M, Devadas S (2002) Silicon physical random functions. In: Proceedings of the 9th ACM conference on computer and communications security, CCS 2002. ACM, New York, NY, USA, pp 148–160Google Scholar
  5. 5.
    Guajardo J, Kumar S, Schrijen G-J, Tuyls P (2007) Fpga intrinsic pufs and their use for ip protection. In: Proceedings of the 9th international workshop on cryptographic hardware and embedded systems, CHES 2007. Springer, Berlin, Heidelberg, pp 63–80Google Scholar
  6. 6.
    Guajardo J, Kumar S, Schrijen G-J, Tuyls P (2008) Brand and ip protection with physical unclonable functions. In: IEEE international symposium on circuits and systems, ISCAS 2008, pp 3186–3189, May 2008Google Scholar
  7. 7.
    Helinski R, Acharyya D, Plusquellic J (2009) A physical unclonable function defined using power distribution system equivalent resistance variations. In: Proceedings of the 46th annual design automation conference, DAC. ACM, New York, NY, USA pp 676–681Google Scholar
  8. 8.
    Hori Y, Yoshida T, Katashita T, Satoh A (2010) Quantitative and statistical performance evaluation of arbiter physical unclonable functions on fpgas. In: International conference on reconfigurable computing and FPGAs (ReConFig) 2010, pp 298–303, Dec 2010Google Scholar
  9. 9.
    Krishna AR, Narasimhan S, Wang X, Wang X Mecca: a robust low-overhead puf using embedded memory array. In: Proceedings of the 13th international conference on Cryptographic hardware and embedded systems, CHES 2011. Springer, Berlin, Heidelberg, pp 407–420Google Scholar
  10. 10.
    Kumar S, Guajardo J, Maes R, Schrijen G-J, Tuyls P (2008) Extended abstract: The butterfly puf protecting ip on every fpga. In: IEEE international workshop on Hardware-oriented security and trust, HOST 2008, pp 67–70CrossRefGoogle Scholar
  11. 11.
    Lim D, Lee J, Gassend B, Suh G, van Dijk M, Devadas S (2005) Extracting secret keys from integrated circuits. IEEE Trans Very Large Scale Integration Syst 13(10):1200–1205CrossRefGoogle Scholar
  12. 12.
    Lofstrom K, Daasch W, Taylor D (2000) Ic identification circuit using device mismatch. In: IEEE international Solid-state circuits conference. Digest of Technical Papers. ISSCC 2000, pp 372–373Google Scholar
  13. 13.
    Maes R, Tuyls P, Verbauwhede I (2008) Intrinsic pufs from flip-flops on reconfigurable devices. In: 3rd Benelux workshop on information and system security (WISSec 2008). Eindhoven, NL, p 17Google Scholar
  14. 14.
    Maes R, Verbauwhede I (2010) Physically unclonable functions: A study on the state of the art andfuture research directions. In: Towards hardware-intrinsic security. Springer, New YorkGoogle Scholar
  15. 15.
    Maiti A, Casarona J, McHale L, Schaumont P (2010) A large scale characterization of ro-puf. In: IEEE international symposium on hardware-oriented security and trust (HOST) 2010, pp 94–99CrossRefGoogle Scholar
  16. 16.
    Majzoobi M, Koushanfar F, Potkonjak M (2008) Testing techniques for hardware security. In: IEEE international test conference, ITC 2008, pp 1–10Google Scholar
  17. 17.
    Morozov S, Maiti A, Schaumont P (2010) An analysis of delay based puf implementations on fpga. In: Sirisuk P, Morgan F, El-Ghazawi T, Amano H (eds) Reconfigurable computing: architectures, tools and applications of lecture notes in computer science, vol 5992. Springer, Berlin, pp 382–387CrossRefGoogle Scholar
  18. 18.
    Pappu RS, Recht B, Taylor J, Gershenfeld N (2002) Physical one-way functions. Science 297:2026–2030CrossRefGoogle Scholar
  19. 19.
    Su Y, Holleman J, Otis B (2008) A digital 1.6 pj/bit chip identification circuit using process variations. IEEE J Solid-State Circ 43(1):69–77Google Scholar
  20. 20.
    Suh GE, Devadas S (2007) Physical unclonable functions for device authentication and secret key generation. In: Proceedings of the 44th annual design automation conference, DAC 2007. ACM, New York, NY, USA, pp 9–14Google Scholar
  21. 21.
    Suzuki D, Shimizu K (2010) The glitch puf: a new delay-puf architecture exploiting glitch shapes. In: Proceedings of the 12th international conference on Cryptographic hardware and embedded systems, CHES 2010. Springer, Berlin, Heidelberg, pp 366–382Google Scholar
  22. 22.
    Tuyls P, Schrijen G-J, Škorić B, van Geloven J, Verhaegh N, Wolters R (2006) Read-proof hardware from protective coatings. In: Cryptographic hardware and embedded systems workshop of LNCS, vol 4249. Springer, New York, pp 369–383Google Scholar
  23. 23.
    van der Leest V, Schrijen G-J, Handschuh H, Tuyls P (2010) Hardware intrinsic security from d flip-flops. In: Proceedings of the fifth ACM workshop on Scalable trusted computing, STC 2010. ACM, New York, NY, USA, pp 53–62Google Scholar
  24. 24.
    Yamamoto D, Sakiyama K, Iwamoto M, Ohta K, Ochiai T, Takenaka M, Itoh K Variety enhancement of puf responses based on the locations of random outputting rs latches.\%208/CHES2011_Session8_3.pdf
  25. 25.
    Yamamoto D, Sakiyama K, Iwamoto M, Ohta K, Ochiai T, Takenaka M, Itoh K (2011) Uniqueness enhancement of puf responses based on the locations of random outputting rs latches. In: Proceedings of the 13th international conference on Cryptographic hardware and embedded systems, CHES 2011. Springer, Berlin, Heidelberg, pp 390–406Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2013

Authors and Affiliations

  • Abhranil Maiti
    • 1
    Email author
  • Vikash Gunreddy
    • 1
  • Patrick Schaumont
    • 1
  1. 1.Virginia TechBlacksburgUSA

Personalised recommendations