Energy Efficient Semi-Serial Interconnect

Abstract

Design and analysis of a high-throughput self-timed serial on-chip communication link is presented. Using fully bit-parallel interconnects that are presented in the previous two chapters for long-range communication links incurs considerable area overhead, routing difficulty, severe crosstalk noise and significant leakage power, making serial links a better alternative. The analysis between parallel and serial links in [108] and [109] shows the tradeoff between link length, latency, dynamic and leakage power as well as active and wiring area. For a given throughput the serial link is always preferable in terms of wiring area and incurs less routing congestion than parallel links. The serial link also takes smaller active area and consumes less leakage and dynamic power than the parallel link for long global communication [109].