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Reconfigurable Computing pp 35–52Cite as

HiPEAC: Upcoming Challenges in Reconfigurable Computing

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Abstract

The new developments in semiconductor technology cause significant problems in chips’ performance, power consumption and reliability, indicating that the “golden” CMOS era is long gone. Technology scaling does not deliver anymore significant performance speedup, the increasing power density poses severe limitations in chips, while, transistors become less reliable. The above introduce great challenges for reconfigurable computing; that is to provide the answer to the performance, power-efficiency and reliability quest posed by current technology trends. Reconfigurable Computing has the potential to achieve such a goal; however, ­several improvements are required to be performed first. In this chapter, we discuss a number of issues which need to be addressed in order to make Reconfigurable Computing a widely used solution for future systems.

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Notes

  1. 1.

     With the term “expected performance” we mean performance that meets the application and system requirements; that depending on the system can be: high performance, real-time performance, guaranteed latency or throughput, etc.

References

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Acknowledgments

We would like to acknowledge all the members of the HiPEAC Reconfigurable Computing cluster for the fruitful discussions regarding the upcoming challenges in reconfigurable computing, and especially thank the rest of the cluster board J. Becker, W. Luk, N. Navarro, and D. Sciuto for their feedback as well as R. Giorgi, D. Pnevmatikatos, D. Soudris, D. Stroobandt, and P. Trancoso for their valuable comments. Furthermore, we would like to thank S. Tzilis for his help on extracting the technology trends from the ITRS documents. Finally, we would like to acknowledge that this chapter is a continuation of the Reconfigurable Computing theme in the HiPEAC1 Roadmap [11] and has been influenced by the EU Workshop on Reconfigurable Computing [12].

Author information

Authors and Affiliations

  1. Computer Engineering, Chalmers University of Technology, 412 96, Gothenburg, Sweden

    Ioannis Sourdis

  2. Computer Engineering, TU Delft, Delft, The Netherlands

    Georgi N. Gaydadjiev

Authors
  1. Ioannis Sourdis
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  2. Georgi N. Gaydadjiev
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Corresponding author

Correspondence to Ioannis Sourdis .

Editor information

Editors and Affiliations

  1. , Faculdade de Engenharia, Universidade do Porto, Rua Dr. Roberto Frias, s/n, Porto, 4200-465, Portugal

    João M. P. Cardoso

  2. Institut für Technik der, Informationsverarbeitung, Karlsruhe Institute of Technology (KIT), Vincenz-Prießnitz-Straße 1, Karlsruhe, 76131, Germany

    Michael Hübner

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Sourdis, I., Gaydadjiev, G.N. (2011). HiPEAC: Upcoming Challenges in Reconfigurable Computing. In: Cardoso, J., Hübner, M. (eds) Reconfigurable Computing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-0061-5_3

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  • DOI: https://doi.org/10.1007/978-1-4614-0061-5_3

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4614-0060-8

  • Online ISBN: 978-1-4614-0061-5

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