Uniprocessor Memory Organizations
In this chapter, two-level memory hierarchies are defined and measurements are presented and analyzed for sequential Prolog architectures. The first level consists of a local memory. The second level consists of an interleaved main memory. Both traditional local memory models, as well as models suited specifically to the Prolog architectures previously introduced, are examined. Queueing models are used to determine the main memory interleaving required to support the local memory configurations. In the next chapter, these memory hierarchy designs are extended to multiprocessor systems.
KeywordsCond Aliasing Ooids
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