Uniprocessor Memory Organizations

  • Evan Tick
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 40)


In this chapter, two-level memory hierarchies are defined and measurements are presented and analyzed for sequential Prolog architectures. The first level consists of a local memory. The second level consists of an interleaved main memory. Both traditional local memory models, as well as models suited specifically to the Prolog architectures previously introduced, are examined. Queueing models are used to determine the main memory interleaving required to support the local memory configurations. In the next chapter, these memory hierarchy designs are extended to multiprocessor systems.


Main Memory Local Memory Cache Size Choice Point Instruction Cache 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Kluwer Academic Publishers 1988

Authors and Affiliations

  • Evan Tick
    • 1
  1. 1.Stanford UniversityStanfordUSA

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