Abstract
Recent advances in VLSI parallel-processing chip architecture have now provided the enabling technology for the production of real-time, low to medium resolution image processing modules. Indeed, a number of VLSI chips, incorporating from 8 to 72 processing elements on a single Silicon die, are currently in development for the construction of SIMD image processing arrays. However, such image processing modules remain large and expensive, attracting a limited and mainly military market. Nevertheless, it is widely believed that a particularly lucrative market exists, especially in the fields of high speed graphics and industrial robotics, for smaller and lower cost real-time image processing modules.
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References
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© 1989 Kluwer Academic Publishers
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Lea, R.M. (1989). A WSI Image Processor. In: Swartzlander, E.E. (eds) Wafer Scale Integration. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1621-3_5
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DOI: https://doi.org/10.1007/978-1-4613-1621-3_5
Publisher Name: Springer, Boston, MA
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