Abstract
This chapter describes the core-based design of a few ASICs using the proposed approach of earlier chapters. Applications of interest include a number of signal processors — FIR chips, FFT chips, and related ASICs and ASSPs.
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© 1996 Kluwer Academic Publishers
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Romdhane, M.S.B., Madisetti, V.K., Hines, J.W. (1996). Design with Reuse. In: Romdhane, M.S.B., Madisetti, V.K., Hines, J.W. (eds) Quick-Turnaround ASIC Design in VHDL. The Kluwer International Series in Engineering and Computer Science, vol 367. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1411-0_5
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DOI: https://doi.org/10.1007/978-1-4613-1411-0_5
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8612-7
Online ISBN: 978-1-4613-1411-0
eBook Packages: Springer Book Archive