Introduction

Abstract

This monograph proposes the rapid design synthesis of Application-Specific Integrated Circuits (ASICs) for Digital Signal Processing (DSP) from a given set of design specifications through the use of library of functional cores. ASICs are the method of choice in DSP, when very high sample rates are sought in combination with low power and area requirements. Their drawback in comparison with programmable DSPs has been their long design times (12–18 months), lack of easy upgrades for legacy ASICs, very little hardware design reuse via libraries of DSP modules, and little capability to combine algorithmic design with lower level implementation tradeoffs. The traditional approach to design ASICs has always been through the following iterative procedure:

• 1. Customer requirements are documented.

• 2. Vendor converts requirements to specifications.

• 3. Vendor “trades off” a variety of possible implementations, selected manually or in an automated manner, that meet the specifications via simulation.

• 4. Vendor synthesizes acceptable design, verifies functionality and timing, and reiterates through the design process if specifications are not met.