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Part of the book series: Frontiers in Electronic Testing ((FRET,volume 5))

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Abstract

As indicated in Chapter 2, the main shortcoming of the disk model was its inability to model faults starting from the actual failure mechanism, rather than from the spot defect level. It was also observed in the model validation experiment [1], [2], [3] and in the experiment described in [4] that most failures in ICs were caused by contamination which deposited on the IC during some processing step. To increase the fidelity of modeling, therefore, it is essential to begin all fault and yield model studies/simulations at the contamination level.

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References

  1. J. Khare, W. Maly, S. Griep and D. Schmitt-Landsiedel, “Yield-Oriented Computer-Aided Defect Diagnosis,” IEEE Transactions on Semiconductor Manufacturing, vol. 8, no. 2, pp. 195–206, May 1995.

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© 1996 Kluwer Academic Publishers

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Khare, J.B., Maly, W. (1996). Contamination-Defect-Fault (CDF) Simulation. In: From Contamination to Defects, Faults and Yield Loss. Frontiers in Electronic Testing, vol 5. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1377-9_3

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  • DOI: https://doi.org/10.1007/978-1-4613-1377-9_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4612-8595-3

  • Online ISBN: 978-1-4613-1377-9

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