In the previous chapters, we discussed the theory and application of various signal processing blocks that fall in the framework of an observer. In this chapter, we will consider hardware implementations of some of these signal-processing blocks.
KeywordsHardware Implementation Adaptive Filter Input Frequency Filter Structure Signal Flow Graph
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- [DR85]S. M. Denver and D. Renshaw. VLSI signal processing: A bit-serial Approach. Addison-Wesley, 1985.Google Scholar
- [Feh91]B. Feher. Field-Programmable Gate Array Implementation of the Recursive Walsh-Hadamard Transformation. In International Conference on DSP Applications and Technology, pages 250–253, 1991.Google Scholar
- [GSS85]R. L. Geiger and E. Sanchez-Sinencio. Active Filter Design Using Operational Transconductance Amplifiers: A Tutorial. IEEE Circuits and Devices Magazine, pages 20–32, Mar 1985.Google Scholar
- [H+90]H. Hsieh et al. Third-Generation Architecture boosts speed and density of Field-Programmable Gate Arrays. In Custom Integrated Circuits Conference, pages 31.2.1–31.2.7, 1990.Google Scholar
- [Lyo76]R. F. Lyon. Two’s Complement pipeline multipliers. IEEE Transactions on Communications, pages 418–425, Apr 1976.Google Scholar
- [PL74]A. Peled and B. Liu. A new hardware realization of digital filters. IEEE Transactions on Acoustics Speech and Signal Processing, pages 456–462, Dec 1974.Google Scholar
- [Tay92]G. E. Taylor. Continuous-time adaptive filters for spectral estimation and line enhancement. M. S. Thesis, University of California, Los Angeles, 1992.Google Scholar
- [ZP85]R. E. Ziemer and R. L. Peterson. Digital Communications and Spread Spectrum Systems. MacMillan, 1985.Google Scholar