Abstract
Asynchronous techniques —that is, techniques that do not use clocks to implement sequencing— are currently attracting considerable interest for digital VLSI circuit design, in particular when the circuits produced are delay-insensitive (DI). A digital circuit is DI when its correct operation is independent of the delays in operators and in the wires connecting the operators, except that the delays are finite and positive.
I regard programs as specific instances of mechanisms, and I wanted to express, at least once, my strong feeling that many of my considerations concerning software are, mutatis mutandis, just as relevant for hardware design.—Edsger W. Dijkstra
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© 1990 Springer-Verlag New York, Inc.
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Martin, A.J. (1990). The Limitations to Delay-Insensitivity in Asynchronous Circuits. In: Feijen, W.H.J., van Gasteren, A.J.M., Gries, D., Misra, J. (eds) Beauty Is Our Business. Texts and Monographs in Computer Science. Springer, New York, NY. https://doi.org/10.1007/978-1-4612-4476-9_35
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DOI: https://doi.org/10.1007/978-1-4612-4476-9_35
Publisher Name: Springer, New York, NY
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