Abstract
SPARC is a computer architecture derived from the reduced instruction set computer (RISC) lineage. As an architecture, SPARC is not a particular chip or implementation. Rather, SPARC allows for a spectrum of possible price/performance implementations, ranging from microcomputers to supercomputers.
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© 1991 Sun Microsystems, Inc.
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Garner, R.B. (1991). The Scalable Processor Architecture (SPARC). In: Catanzaro, B.J. (eds) The SPARC Technical Papers. Sun Technical Reference Library. Springer, New York, NY. https://doi.org/10.1007/978-1-4612-3192-9_1
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DOI: https://doi.org/10.1007/978-1-4612-3192-9_1
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