Parallelism Detection in Nested Loops

  • Alain Darte
  • Yves Robert
  • Frédéric Vivien

Abstract

Loop transformations have been shown to be useful for extracting parallelism from regular nested loops for a large class of machines, from vector machines and VLIW machines to multiprocessor architectures. Of course, each type of machine corresponds to a different optimized code; depending on the memory hierarchy of the target, the granularity of the generated code must be carefully chosen so that memory access is optimized. Fine-grain parallelism is efficient for vector machines, whereas for distributed-memory machines, coarse-grain parallelism (obtained by tiling or blocking techniques) is preferable and permits the reduction of interprocessor communication.

Keywords

Hull Paral Cuted 

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Copyright information

© Springer Science+Business Media New York 2000

Authors and Affiliations

  • Alain Darte
    • 1
  • Yves Robert
    • 1
  • Frédéric Vivien
    • 2
  1. 1.Laboratoire LIPÉcole Normale Supérieure de LyonLyon Cedex 07France
  2. 2.Laboratoire ICPSUniversité Louis PasteurIllkichFrance

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