Abstract
Efficient proof techniques are vital for the success of formal verification of hardware. First-Order Logic theorem provers satisfy this requirement. This paper deals with experiences in applying such a tool, OTTER, to the verification of correctness of combinational logic. Several proof methodologies are here discussed: a rewrite rules and a resolution based approach are compared.
This work is partially supported by the EEC under contract ESPRIT BRA 3216 “CHARME”
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© 1991 Springer-Verlag London
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Camurati, P., Margaria, T., Prinetto, P. (1991). Use of the OTTER theorem prover for the formal verification of hardware. In: Jones, G., Sheeran, M. (eds) Designing Correct Circuits. Workshops in Computing. Springer, London. https://doi.org/10.1007/978-1-4471-3544-9_14
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DOI: https://doi.org/10.1007/978-1-4471-3544-9_14
Publisher Name: Springer, London
Print ISBN: 978-3-540-19659-4
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