Network Video Surveillance System based on FPGA

Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 154)


A new network video surveillance system based on FPGA is introduced according to the development tendency of video surveillance system. This video surveillance system is composed of video surveillance head whose core is Nios II processor, correlative network equipments and the computer. The video surveillance head has two Nios II processors which are designed for the image capture and network transmission of the video image. The original image data need to be compressed according to a new video compression standard H.264 before network transmission. The computer uses VC++ to design the interface window and the video receiving system. The result shows that this network video surveillance system meets the design requirements with good image quality.


Video Surveillance Network Transmission Video Compression Video Surveillance System Embed Processor 
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  1. 1.
    Tao Wang, Xunxue Cui, Ping Liu. A Novel Video Monitoring System Based on Wireless Mesh Network [J].IEEE, 2008.4: 546–548.Google Scholar
  2. 2.
    Suresh Krishnamurthy, Debargha Mukherjee. Video Monitoring System Framework for Video on Demand [J].IEEE Transactions on Consumer Electronics,1995.5: 350–352.Google Scholar
  3. 3.
    Hong-tao Ding. The business of network video surveillance and the application access methods [J]. Information Technology, 2008.5: 358.Google Scholar
  4. 4.
    ITU-T. Recommendation H.264: Advance Video coding for generic audio-visual services [S]. 2005.3.Google Scholar
  5. 5.
    Hou-jie Bi. A new generation of video compression coding standard-H.264/AVC, edtied by Posts & Telecom Press, Beijing (2005), in pressGoogle Scholar
  6. 6.
    Jian Lou, Liang Lu, Lu Yu, Jie Dong. H.264 Analysis of transform and quantization [J]. Journal of Zhe Jiang University ,2004.5: 566–570Google Scholar
  7. 7.
    Hai-ying Liu, Zhao-yang Zhang, Li-quan Shen. FPGA-based H.264 conversion of highperformance hardware implementation of quantitative [J]. China Journal of Image and Graphics, 2006.11: 1636–1639.Google Scholar

Copyright information

© Springer-Verlag London Limited 2012

Authors and Affiliations

  1. 1.College of Information and Communication EngineeringHarbin Engineering UniversityHarbinChina

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