Analog VLSI implementation of a spike driven stochastic dynamical synapse
We have undertaken to implement in analog electronics a neural network device which autonomously learns from its experience in real time. Implementing a large neural network that has this capability, implies analog VLSI technology and on-chip learning. This means designing a plastic synaptic connection that 1. is simple (low number of transistors and reduced silicon area), 2. has low power consumption and 3. preserves memory on long time scales and, at the same time, can be modified in short time intervals during stimulation.
KeywordsCurrent Mirror Synaptic Efficacy Analog VLSI Presynaptic Spike Spike Duration
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- Hafliger P., Mahowald M. and Watts L., A spike based learning neuron in analog VLSI, Advances in neural information processing systems, 9, 692 (1996)Google Scholar
- Fusi S. and Mattia M. Collective behavior of networks with linear (VLSI) integrate-and-fire neurons, submitted to Neural Computation, (1998)Google Scholar
- Mattia M., Del Giudice P. and Amit D.J., Asynchronous simulation of large networks of spiking neurons and dynamical synapses, in these proceedings Google Scholar
- Annunziato M. and Fusi S. Queue theory approach to a spike driven stochastic synaptic dynamics, these proceedings Google Scholar
- Meyer P.L., Introductory Probability and Statistical Applications, Addison Welsley, Reading Mass., page 287, (1965)Google Scholar