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Designing and Instrumenting a Software Template for Embedded Parallel Systems

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Abstract

This paper considers the design of a reusable software template for a parallel data-farm which uses demand-based load-balancing. A feature of the farm is integral instrumentation. A design example is given for a hybrid processor message-passing machine (the Paramid) in which monitoring is accomplished by an instrumented interface program. Other aspects of the design are use of buffering to mask communication latency, an asynchronous multicast provision, and a controlled interface to the worker functions. Trace material is discussed from two examples when the template design was used to monitor real-time, continuous-flow applications. The template is a component of the Pipelined Processor Farm (PPF) methodology.

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References

  1. A. C. Downton, R. W. S. Tregidgo, and A. Quhadar. Generalized parallelism for embedded vision applications. In A. Y. Zomaya, editor, Parallel Computing: Paradigms and Applications, pages 553–577. Thompson, 1996.

    Google Scholar 

  2. S. Ahmed, N. Carriero, and D. Gelernter. The Linda program builder. In A. Nicolau, D. Gelernter, T. Gross, and D. Padua, editors, Advances in Languages and Compilers for Parallel Processing, pages 71–87. Pitman, 1991.

    Google Scholar 

  3. D. Feldcamp and A. Wagner. Using the Parsec environment to implement high-performance processor farm. In 28th Annual Hawaii International Conference on System Sciences, pages 212–221, 1995.

    Google Scholar 

  4. D. A. Reed. Performance instrumentation techniques for parallel systems. Lecture Notes in Computer Science, 729:463–490, 1993.

    Article  Google Scholar 

  5. J. Jiang, A. Wagner, and S. Chanson. Tmon: A real-time performance monitor for transputer-based multicomputers. In D. L. Fielding, editor, Transputer Research and Applications 4 pages 36–45. IOS, 1990.

    Google Scholar 

  6. Z. Segall and L. Rudolph. PIE: A programming and instrumentation environment for parallel processing. IEEE Software, pages 22–37, November 1985.

    Google Scholar 

  7. M. C. Rinard, D. J. Scales, and M. S. Lam. Jade: A high-level machine- independent language for parallel programming. IEEE Computer, pages 28–38, June 1993.

    Google Scholar 

  8. Transtech Parallel Systems Ltd., 17–19 Manor Court Yard, Hughenden Ave., High Wycombe, Bucks., UK.The Paramid User’s Guide, 1993.

    Google Scholar 

  9. M. Atkins. Performance and the i860 microprocessor. IEEE Micro page 24, October 1991.

    Google Scholar 

  10. D. A. P. Mitchell, J. A. Thompson, G. A. Manson, and G. R. Brooks. Inside the Transputer. Blackwell Scientific Publications, 1990.

    Google Scholar 

  11. A. D. Birrell. An introduction to programming with threads. Technical report, Digital Systems Research Center, 130 Lytton Avenue, Palo Alto, Cal., 1989. Research Report 35.

    Google Scholar 

  12. H. P. Sava, M. Fleury, A. C. Downton, and A. F. Clark. A case study in pipeline processor farming: Parallelising the H.263 encoder, 1996. In this volume.

    Google Scholar 

  13. A. Quhadar and A. C. D. Downton. Structured parallel design for embedded vision systems: An application case study. In Proceedings of IPA ’95 IEE International Conference on Image Processing and Its Applicationspages 712–716, July 1995. IEE Conference Publication No. 410.

    Google Scholar 

  14. W. N. Rea. Performance of task farming with transputers. In T. S. Durrani, W. A. Sandham, J. J. Soraghan, and S. M. Forbes, editors, Applications of Transputers 3, pages 792–797. IOS, 1991.

    Google Scholar 

  15. L. G. Valiant. General purpose parallel architectures. In J. van Leeuwen, editor, Handbook of Theoretical Computer Science, volume A, pages 943–972. Elsevier, 1990.

    Google Scholar 

  16. R. H. Arpaci, A. C. Dusseau, A. M. Vahdat, L. T. Liu, T. E. Anderson, and D. A. Patterson. The interaction of parallel and sequential workloads on a network of workstations. In ACM Sigmetrics Conference on Measurement and Modelling of Computer Systems, pages 267–278. ACM, May 1995.

    Google Scholar 

  17. S. Yalamanchili and J. K. Aggrawal. Analysis of a model for image processing. Pattern Recognition, 18(1): 1–16, 1985.

    Article  Google Scholar 

  18. P. J. B. King. Computer and Communication Performance Modelling. Prentice Hall, 1990.

    Google Scholar 

  19. G. R. Andrews. Paradigms for process interaction in distributed programs. ACM Computing Surveys, 23(l):49–90, 1991.

    Article  Google Scholar 

  20. R. Hastings and B. Joyce. Purify. In Winter Usenix ’92 Conference, 1992. Preprint.

    Google Scholar 

  21. A. W. Roscoe. Routing messages through networks: An exercise in deadlock avoidance. In T. Muntean, editor, 7th Occam User Group Technical Meeting, pages 55–79. IOS, 1987.

    Google Scholar 

  22. H. F. Jordan. Problems in characterizing barrier performance. In M. Simmons, R. Koskela, and I. Bucher, editors, Instrumentation for Future Parallel Computing Systems, pages 185–200. ACM, 1989.

    Google Scholar 

  23. [23]G. A. Geist, M. T. Heath, B. W. Peyton, and P. H. Worley. A user’s guide to PICL: a portable instrumented communication library. Technical report, Oak Ridge National Laboratory, Oak Ridge, TN, USA, August 1990. Report ORNL/TM-11616.

    Google Scholar 

  24. P. H. Worley. A new PICL trace file format. Technical report, Oak Ridge National Laboratory, Oak Ridge, TN, USA, September 1992. Report ORNL/TM-12125.

    Google Scholar 

  25. M. T. Heath and J. A. Etheridge. Visualizing the performance of parallel programs. IEEE Software, 8(5):29–39, 1991.

    Article  Google Scholar 

  26. A. Bauch, T. Kosch, E. Maehle, and Obeloer. The software-monitor DELTA-T and its use for performance measurements of some farming variants on the multi-transputer system DAMP. Lecture Notes in Computer Science, 634:67–78, 1992. Proceedings of CONPAR ’92 - VAPP V.

    Google Scholar 

  27. M. Fleury, A. C. Downton, A. F. Clark, and H. P. Sava. The design of a clock synchronization sub-system for parallel embedded systems, 1996. In preparation.

    Google Scholar 

  28. R. Cole and C. Foxcroft. An experiment in clock synchronization. The Computer Journal, 31(6):496–502, 1988.

    Article  Google Scholar 

  29. T. H. Dunigan. Hypercube clock synchronization. Concurrency: Practice and Experience, 4(3):257–268, May 1992.

    Article  Google Scholar 

  30. P. H. Welch. Graceful termination — graceful resetting. In Bakkers A., editor, 10th Occam User Group Technical Meeting. IOS, 1989.

    Google Scholar 

  31. C. Pancake. Visualization techniques for parallel debugging and performance-tuning tools. In A. Y. Zomaya, editor, Parallel Computing: Paradigms and Applications, pages 376–393. Thompson, 1996.

    Google Scholar 

  32. J. Gosling and H. McGilton. The Java language environment. Technical report, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, Cal., 1995.

    Google Scholar 

  33. G. Agha, C. Houck, and R. Panwar. Distributed execution of Actor programs. In U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua, editors, Languages and Compilers for Parallel Computing, pages 1–17. Springer, 1992. Lecture Notes in Computer Science Volume 589.

    Chapter  Google Scholar 

  34. T. J. LeBlane and J. M. Mellor-Crummey. Debugging parallel programs with instant replay. IEEE Transactions on Computers, 36(4):471–481, April 1987.

    Article  Google Scholar 

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© 1996 Springer-Verlag London Limited

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Fleury, M., Sava, H.P., Downton, A.C., Clark, A.F. (1996). Designing and Instrumenting a Software Template for Embedded Parallel Systems. In: Jesshope, C., Shafarenko, S. (eds) UK Parallel ’96. Springer, London. https://doi.org/10.1007/978-1-4471-1504-5_12

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  • DOI: https://doi.org/10.1007/978-1-4471-1504-5_12

  • Publisher Name: Springer, London

  • Print ISBN: 978-3-540-76068-9

  • Online ISBN: 978-1-4471-1504-5

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