A Classification Scheme for Rendering Algorithms on Parallel Computers
In recent years, the size of data sets in applications such as scientific visualization and virtual reality, have been continously growing. In High Performance Computing (HPC), parallel computers are used to reduce the total rendering time of these data sets. Shared memory architecture computers are nowadays widely used, but distributed memory computers promise better performance due to their scalability. At the Fraunhofer Institute for Computer Graphics, parallel computer graphics research  is carried out using both these architectures.
KeywordsClassification Scheme Idle Time High Performance Computing Subdivision Scheme Transfer Control
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- 1.del Pino A., “Volume Visualization on Distributed Memory Computers”, SERC Visualization Community Club Seminar on Parallel Processing for Visualization, University of Manchester, 17th Nov. 1993Google Scholar
- 2.Giloi W K., “From SUPRENUM to MANNA and META - Parallel Computer Development at GMD FIRST”, Proceedings 1994 Mannheim Supercomputing Seminar, Sauer-Verlag, Munich, 1994Google Scholar
- 3.Jackel D., “Grafik-Computer”, Springer-Verlag Berlin Heidelberg 1992Google Scholar
- 4.Whitman S., “Dynamic Load Balancing for Parallel Polygon Rendering”, IEEE Computer Graphics & Applications, Vol. 14, No. 4, July 1994Google Scholar
- 5.Paddon D. J., Chalmers A. G., “Parallel Processing for Rendering”, Proceedings 3rd Eurographics Workshop on Rendering, Bristol, England, 17–20 May 1992, pp 1–7Google Scholar
- 6.Whitman S., `Parallel Graphics Rendering Algorithms“, Proceedings 3rd Eurographics Workshop on Rendering, Bristol, England, 17–20 May 1992, pp 123–134Google Scholar