Advertisement

Debugging and Performance Analysis of Many-core Programs

Chapter

Abstract

Testing, debugging, maintenance and performance tuning of software applications usually take up more than 50% of the total effort that goes into designing software systems. The introduction of parallelism, the challenges posed by the complexity of memory systems and cache hierarchies exacerbates the already complex issues surrounding this area: concurrency bugs are notoriously hard to reproduce or detect through intrusive debugging techniques; cache misses and resource contention usually require deep understanding of the hardware and operating system. In this chapter we survey the most important issues in this area, the specific challenges in the context of software systems designed for many-core hardware as well as the most promising approaches for tackling correctness and performance problems.

Keywords

Cache Line Race Condition Transactional Memory Performance Tuning Memory Interface 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Mars J, Williams D, Upton D, Ghosh S, Hazelwood K (2008) A Reactive Unobtrusive Prefetcher for Multicore and Manycore Architecture. Proceedings of the Workshop on Software and Hardware Challenges of Manycore Platforms 2008, 41-50Google Scholar
  2. 2.
    Nellans D, Sudan K, Balasubramonian R, Brunvand E (2010) Improving Server Performance on Multi-Cores via Selective Off-loading of OS Functionalility. Proceedings of the 10th Workshop on Interaction between Operating Systems and Computer ArchitectureGoogle Scholar
  3. 3.
    Magnusson P S et al (2002) Simics: A Full System Simulation Platform. Computer, 35(2):50-58CrossRefGoogle Scholar
  4. 4.
    Miller J E et al (2010) Graphite: A Distributed Parallel Simulator for Multicores. IEEE International Symposium on High-Performance Computer Architecture.Google Scholar
  5. 5.
    Acumem/RogueWave (2007) Performance Analysis for HPC/Multi-core Systems. http://www.acumem.com/images/stories/AcumemSlowSpotter.pdf.Accessed 11 January 2011
  6. 6.
    Samuel W, Datta K, Carter J, Oliker L, Shalf J, Yelick K et al (2008) PERI: Auto-tuning MemoryIntensive Kernels for Multi-core. Journal of Physics.Google Scholar
  7. 7.
    Spath D, Weisbecker A, Hebish E (2010) Market Overview of Tools for Multi-core Software Development. Fraunhofer VerlagGoogle Scholar
  8. 8.
    Windriver (2010) White Paper: WindRiver Simics for Multi-core Systems Development. http://www.windriver.com/whitepapers/whitepaper.php?f=WP_Multi-core_Bug_Simics_0410.pdf. Accessed 11 January 2011

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.Oy L M Ericsson AbJorvasFinland

Personalised recommendations