Low-Voltage Monolayer Pentacene Transistors Fabricated on Ultrathin Crystalline Self-Assembled Monolayer Based Dielectric

Chapter
Part of the Springer Theses book series (Springer Theses)

Abstract

In this final chapter on organic transistors, two of the issues limiting the fabrication of low-cost, high performance transistors are addressed by using concepts presented in earlier chapters. The first major hurdle is associated with wasting materials during the deposition processes. Using a thinner layer of the semiconductor (much thinner than 40 nm usually used) allows for a lower material cost. In this work, the two-dimensional growth of pentacene on crystalline OTS was utilized to fabricate monolayer thin transistors (M-TFTs), wherein the active semiconducting channel is only one monolayer in thickness. The second major issue is the very high operating voltages associated with a thick dielectric (~100 V). To resolve this issue M-TFTs were fabricated on an ultrathin (OTS) gate-dielectric; this allows for operating voltages of ~3 V or less.

Keywords

Hydrolysis Quartz SiO2 Hydroxyl Silane 

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Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  1. 1.c3Nano Inc.Mountain ViewUSA

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