Abstract
Signal propagation delays and signal rise and fall times in CMOS circuits are related to the RC time constants of the circuit elements in the path. Determination of capacitance C of MOSFETs and parasitic elements is therefore an essential part of building models for circuit simulations. MOSFET capacitance components must be characterized as a function of voltage to capture their behavior during a transient switching cycle. Capacitance measurements are utilized to determine MOSFET gate linewidths and gate oxide thickness. Capacitances of conducting layers with dielectric isolation give a measure of inter-level dielectric properties such as effective dielectric constant and film geometries such as layer thicknesses and linewidths. C–V characteristics of diodes are used for profiling carrier densities in silicon devices. Carrier lifetime measurement in silicon utilizes C–V and C–time characteristics of MOS capacitors.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Taur Y, Ning TH (2009) Fundamentals of modern VLSI devices, 2nd edn. Cambridge University Press, New York, NY
Weste NHE, Eshraghian K, Smith MJS (2000) Principles of CMOS VLSI design, 2nd edn. Addison Wesley, Reading, MA
Schroder DK (2006) Semiconductor material and device characterization, 3rd edn. Wiley, Hoboken, NJ
Wong S-C, Liu PS, Ru J-W, Lin S-T (1998) Interconnection capacitance models for VLSI circuits. Solid State Electron 42:969–977
Fleury D, Cros A, Romanjek K, Roy D, Perrier F, Dumont B et al (2008) Automatic extraction methodology for accurate measurements of effective channel length on 65-nm MOSFET technology and below. IEEE Trans Semicond Manuf 21:504–512
Chen JC, McGaughy BW, Sylvester D, Hu C (1996) An on-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique. IEEE international electron device meeting (IEDM) technical digest, 1996:69–72
Polansky S, Solomon P, Ketchen M, Shiling E, Economikos L, Bhushan M (2009) Back-end-of-line quadrature-clocked voltage-dependent capacitance measurements. 35th international symposium for testing and failure analysis (ISTFA), San Hose, 2009
Vendrame L, Bortesi L, Cattane F, Bogliolo A (2006) Crosstalk-based capacitance measurements: theory and applications. IEEE Trans Semicond Manuf 19:67–77
Chang Y-W, Chang H-W, Lu T-C, King Y-C, Ting W, Ku Y-HJ et al (2006) Charge-based capacitance measurement for bias-dependent capacitance. IEEE Electron Device Lett 27:390–392
Sylvester D, Chen J, Hu C (1998) Investigation of interconnect capacitance using charge-based capacitance measurement (CBCM) technique and three-dimensional simulations. IEEE J Solid-State Circuits 33:449–453
Koomen J (1973) Investigation of MOST channel conductance in weak inversion. Solid State Electron 16:801–810
Hayes JD, Agarwal K, Nassif S (2009) Technique for the rapid characterization of parametric distributions. IEEE Trans Semicond Manuf 22:66–71
Jackson JD (1975) Classical electrodynamics, 2nd edn. Wiley, New York, NY
Purcell EM (1985) Electricity and magnetism, Berkeley physics course, vol 2, 2nd edn. McGraw-Hill, New York, NY
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2011 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Bhushan, M., Ketchen, M.B. (2011). Capacitors. In: Microelectronic Test Structures for CMOS Technology. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-9377-9_4
Download citation
DOI: https://doi.org/10.1007/978-1-4419-9377-9_4
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4419-9376-2
Online ISBN: 978-1-4419-9377-9
eBook Packages: EngineeringEngineering (R0)