We envision a design methodology that is built around advances in high-level design and verification to improve the quality and time to design microelectronic systems. In this chapter, we will present a brief overview of the three different parts of high-level verificationas shown in Fig. 1.1 on which the verification algorithms are applied. We first present in Sect. 2.1 and in Sect. 2.2 a description of high-level designs and RTL designs respectively. We then in Sect. 2.3 give a brief introduction of high-level synthesis. In the next two sections we introduce the concept of model checking, and our program representation scheme that is used throughout the book.


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© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  1. 1.Synopsys Inc.HillsboroUSA
  2. 2.Department of Computer Science and EngineeringUniversity of California, San DiegoLa JollaUSA

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